/** * @file regs-gpio-fp.h * @brief GPIO register file for driver(Fingerprint) * * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd. */ #ifndef __REGS_GPIO_FP_H__ #define __REGS_GPIO_FP_H__ /************************************************************************/ /* TZPC SFR Address */ /************************************************************************/ #if defined(CONFIG_EXYNOS9810) #define FP_TZPC_USI00_SFR_BASE 0x10410000 #define FP_TZPC_PERIC0_0_SFR_BASE 0x10432000 #elif defined(CONFIG_EXYNOS8895) #define FP_TZPC3_SFR_BASE 0x10130000 #define FP_TZPC13_SFR_BASE 0x101D0000 #define FP_TZPC_PERIC0_0_SFR_BASE 0x104D2000 #elif defined(CONFIG_EXYNOS8890) #define FP_TZPC12_SFR_BASE 0x100F0000 #define FP_TZPC11_SFR_BASE 0x100E0000 #elif defined(CONFIG_EXYNOS7885) /* empty */ #elif defined(CONFIG_EXYNOS7880) || defined(CONFIG_EXYNOS7870) #define FP_TZPC2_SFR_BASE 0x10020000 #define FP_TZPC4_SFR_BASE 0x10040000 #elif defined(CONFIG_EXYNOS7570) #define FP_TZPC2_SFR_BASE 0x10020000 #define FP_TZPC4_SFR_BASE 0x10040000 #elif defined(CONFIG_EXYNOS7580) #define FP_TZPC3_SFR_BASE 0x10130000 #elif defined(CONFIG_EXYNOS7420) #define FP_TZPC12_SFR_BASE 0x100F0000 #define FP_TZPC13_SFR_BASE 0x10080000 #elif defined(CONFIG_EXYNOS5433) || defined(CONFIG_EXYNOS5430) #define FP_TZPC5_SFR_BASE 0x10150000 #define FP_TZPC12_SFR_BASE 0x100F0000 #elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420) #define FP_TZPC3_SFR_BASE 0x10130000 #endif #if defined(CONFIG_EXYNOS9810) #define FP_TZPC_DECPROTSTAT 0x200 #define FP_TZPC_DECPROTSET 0x204 #define FP_TZPC_DECPROTCLR 0x208 #else #define FP_TZPC_DECPROT0STAT 0x800 #define FP_TZPC_DECPROT0SET 0x804 #define FP_TZPC_DECPROT0CLR 0x808 #define FP_TZPC_DECPROT1STAT 0x80C #define FP_TZPC_DECPROT1SET 0x810 #define FP_TZPC_DECPROT1CLR 0x814 #define FP_TZPC_DECPROT2STAT 0x818 #define FP_TZPC_DECPROT2SET 0x81C #define FP_TZPC_DECPROT2CLR 0x820 #define FP_TZPC_DECPROT3STAT 0x824 #define FP_TZPC_DECPROT3SET 0x828 #define FP_TZPC_DECPROT3CLR 0x82C #define FP_TZPC_SECUCONPROT0STAT 0x0004 #define FP_TZPC_SECUCONPROT0SET 0x0008 #define FP_TZPC_SECUCONPROT0CLR 0x000C #define FP_TZPC_SECUCONPROT1STAT 0x0014 #define FP_TZPC_SECUCONPROT1SET 0x0018 #define FP_TZPC_SECUCONPROT1CLR 0x001C #define FP_TZPC_SECUCONPROT2STAT 0x0024 #define FP_TZPC_SECUCONPROT2SET 0x0028 #define FP_TZPC_SECUCONPROT2CLR 0x002C #define FP_TZPC_SECUCONPROT3STAT 0x0034 #define FP_TZPC_SECUCONPROT3SET 0x0038 #define FP_TZPC_SECUCONPROT3CLR 0x003C #define FP_TZPC_SECUCONPROT4STAT 0x0044 #define FP_TZPC_SECUCONPROT4SET 0x0048 #define FP_TZPC_SECUCONPROT4CLR 0x004C #define FP_TZPC_SECUCONPROT5STAT 0x0054 #define FP_TZPC_SECUCONPROT5SET 0x0058 #define FP_TZPC_SECUCONPROT5CLR 0x005C #define FP_TZPC_SECUCONPROT6STAT 0x0064 #define FP_TZPC_SECUCONPROT6SET 0x0068 #define FP_TZPC_SECUCONPROT6CLR 0x006C #define FP_TZPC_SECUCONPROT7STAT 0x0074 #define FP_TZPC_SECUCONPROT7SET 0x0078 #define FP_TZPC_SECUCONPROT7CLR 0x007C #define FP_TZPC_SECUCONPROT8STAT 0x0084 #define FP_TZPC_SECUCONPROT8SET 0x0088 #define FP_TZPC_SECUCONPROT8CLR 0x008C #define FP_TZPC_SECUCONPROT9STAT 0x0094 #define FP_TZPC_SECUCONPROT9SET 0x0098 #define FP_TZPC_SECUCONPROT9CLR 0x009C #define FP_TZPC_SECUCONPROT10STAT 0x00A4 #define FP_TZPC_SECUCONPROT10SET 0x00A8 #define FP_TZPC_SECUCONPROT10CLR 0x00AC #endif /************************************************************************/ /* TZPC control Register */ /************************************************************************/ #if defined(CONFIG_EXYNOS9810) /* USI00_CH0 - DECPROT2 */ #define FP_TZPC_USI00_CH0_M (0x1 << 5) /* USI00_I_MODE - DECPROT3 */ #define FP_TZPC_USI00_I_MODE_M (0x1 << 22) /* GPIO */ #define FP_TZPC_GPIO_PERIC0_M (0xFFFFFFF0) #elif defined(CONFIG_EXYNOS8895) /* USI00_CH0 - DECPROT2 */ #define FP_TZPC_USI00_CH0_M (0x1 << 4) /* USI00_I_MODE - DECPROT3 */ #define FP_TZPC_USI00_I_MODE_M (0x1 << 0) /* GPIO */ #define FP_TZPC_GPIO_PERIC0_M (0xFFFFF0FF) #elif defined(CONFIG_EXYNOS8890) /* SPI - DECPROT0 */ #define FP_TZPC_SPI4_M (0x1 << 0) #define FP_TZPC_SPI5_M (0x1 << 1) #define FP_TZPC_SPI6_M (0x1 << 2) #define FP_TZPC_SPI7_M (0x1 << 3) /* GPIO - DECPROT1 */ #define FP_TZPC_GPIO_ESE_M (0x1 << 1) #elif defined(CONFIG_EXYNOS7885) /* SPI - SECUPROT9[18] */ #define FP_TZPC_SPI1_M (0x1 << 18) /* GPIO */ #define FP_TZPC_GPIO_TOM_M (0xF0FFFFFF) /* GPP6[0-3]:24~27 bit */ #elif defined(CONFIG_EXYNOS7880) || defined(CONFIG_EXYNOS7870) /* SPI - DECPROT2 */ #define FP_TZPC_SPI1_M (0x1 << 1) /* GPIO - DECPROT0 */ #define FP_TZPC_GPIO_ESE_M (0x1 << 3) #elif defined(CONFIG_EXYNOS7570) /* SPI - DECPROT2 */ #define FP_TZPC_SPI0_M (0x1 << 1) /* GPIO - DECPROT0 */ #define FP_TZPC_GPIO_ESE_M (0x1 << 3) #elif defined(CONFIG_EXYNOS7580) /* SPI - DECPROT2 */ #define FP_TZPC_SPI1_M (0x1 << 0) #define FP_TZPC_SPI2_M (0x1 << 1) /* GPIO - DECPROT1 */ #define FP_TZPC_GPIO_ESE_M (0x1 << 5) #elif defined(CONFIG_EXYNOS7420) /* SPI - DECPROT3 */ #define FP_TZPC_SPI0_M (0x1 << 0) #define FP_TZPC_SPI1_M (0x1 << 1) #define FP_TZPC_SPI2_M (0x1 << 2) #define FP_TZPC_SPI3_M (0x1 << 3) #define FP_TZPC_SPI4_M (0x1 << 4) /* GPIO - DECPROT1 */ #define FP_TZPC_GPIO_ESE_M (0x1 << 0) #elif defined(CONFIG_EXYNOS5433) || defined(CONFIG_EXYNOS5430) /* SPI - DECPROT0 */ #define FP_TZPC_SPI0_M (0x1 << 5) #define FP_TZPC_SPI1_M (0x1 << 6) #define FP_TZPC_SPI2_M (0x1 << 7) #if defined(CONFIG_EXYNOS5433) /* GPIO - DECPROT2 */ #define FP_TZPC_GPIO_FINGER (0x1 << 6) #endif #elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420) /* SPI - DECPROT2 */ #define FP_TZPC_SPI0_M (0x1 << 4) #define FP_TZPC_SPI1_M (0x1 << 5) #define FP_TZPC_SPI2_M (0x1 << 6) #endif /************************************************************************/ /* GPIO control Register */ /************************************************************************/ #if defined(CONFIG_EXYNOS9810) /* GPP0 */ #define FP_GPIO_PERIC0_SFR_BASE 0x10430000 /* USI00 */ #define FP_USI00_I_MODE_SFR_BASE 0x10411000 #define FP_USI00_I_MODE_SFR 0x0004 #elif defined(CONFIG_EXYNOS8895) /* GPD1 */ #define FP_GPIO_PERIC0_SFR_BASE 0x104D0000 /* USI00 */ #define FP_USI00_I_MODE_SFR_BASE 0x10421000 #define FP_USI00_I_MODE_SFR 0x0000 #elif defined(CONFIG_EXYNOS8890) /* GPF3 */ #define FP_GPIO_ESE_SFR_BASE 0x14CA0000 #elif defined(CONFIG_EXYNOS7885) /* GPP6 */ #define FP_GPIO_TOP_SFR_BASE 0x139B0000 #elif defined(CONFIG_EXYNOS7880) || defined(CONFIG_EXYNOS7870) /* GPC7 */ #define FP_GPIO_ESE_SFR_BASE 0x139E0000 #elif defined(CONFIG_EXYNOS7570) /* GPC7 */ #define FP_GPIO_ESE_SFR_BASE 0x139E0000 #elif defined(CONFIG_EXYNOS7580) /* GPC0 */ #define FP_GPIO_ESE_SFR_BASE 0x138E0000 #elif defined(CONFIG_EXYNOS7420) /* GPV7 */ #define FP_GPIO_ESE_SFR_BASE 0x14CA0000 #elif defined(CONFIG_EXYNOS5433) /* GPD5 */ #define FP_GPIO_FINGER_SFR_BASE 0x14CB0000 #elif defined(CONFIG_EXYNOS5430) /* GPD5 */ #define FP_GPIO_PERIC_SFR_BASE 0x14CC0000 #elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420) /* GPA2 */ #define FP_GPIO_BLOCK_SFR_BASE 0x14010000 #endif #if defined(CONFIG_EXYNOS8895) /* GPD1[0]~[3] */ #define FP_GPIOCON 0x0020 #define FP_GPIODAT 0x0024 #define FP_GPIOPUD 0x0028 #define FP_GPIODRV 0x002C #define FP_GPIOCONPDN 0x0030 #define FP_GPIOPUDPDN 0x0034 #elif defined(CONFIG_EXYNOS7885) /* GPP6[0]~[4] */ #define FP_GPIOCON 0x00E0 #define FP_GPIODAT 0x00E4 #define FP_GPIOPUD 0x00E8 #define FP_GPIODRV 0x00EC #define FP_GPIOCONPDN 0x00F0 #define FP_GPIOPUDPDN 0x00F4 #elif defined(CONFIG_EXYNOS7420) || defined(CONFIG_EXYNOS5433) \ || defined(CONFIG_EXYNOS7580) || defined(CONFIG_EXYNOS8890) \ || defined(CONFIG_EXYNOS7880) || defined(CONFIG_EXYNOS7870) \ || defined(CONFIG_EXYNOS7570) || defined(CONFIG_EXYNOS9810) #define FP_GPIOCON 0x0000 #define FP_GPIODAT 0x0004 #define FP_GPIOPUD 0x0008 #define FP_GPIODRV 0x000C #define FP_GPIOCONPDN 0x0010 #define FP_GPIOPUDPDN 0x0014 #elif defined(CONFIG_EXYNOS5430) #define FP_GPIOCON 0x0160 #define FP_GPIODAT 0x0164 #define FP_GPIOPUD 0x0168 #define FP_GPIODRV 0x016C #define FP_GPIOCONPDN 0x0170 #define FP_GPIOPUDPDN 0x0174 #elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420) #define FP_GPIOCON 0x0040 #define FP_GPIODAT 0x0044 #define FP_GPIOPUD 0x0048 #define FP_GPIODRV 0x004C #define FP_GPIOCONPDN 0x0050 #define FP_GPIOPUDPDN 0x0054 #endif #endif /* __REGS_GPIO_FP_H__ */