/**
 * @file   regs-tzpc.h
 * @brief  TZPC register file for driver
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 */

#ifndef __REGS_TZPC_H__
#define __REGS_TZPC_H__

#define TZPC0_SFR_BASE		0x10100000
#define TZPC1_SFR_BASE		0x10110000
#define TZPC2_SFR_BASE		0x10120000
#define TZPC3_SFR_BASE		0x10130000
#define TZPC4_SFR_BASE		0x10140000
#define TZPC5_SFR_BASE		0x10150000
#define TZPC6_SFR_BASE		0x10160000
#define TZPC7_SFR_BASE		0x10170000
#define TZPC8_SFR_BASE		0x10180000
#define TZPC9_SFR_BASE		0x10190000
#define TZPC10_SFR_BASE		0x100E0000
#define TZPC11_SFR_BASE		0x100F0000

#define TZPC_R0SIZE		0x000
#define TZPC_DECPROT0STAT	0x800
#define TZPC_DECPROT0SET	0x804
#define TZPC_DECPROT0CLR	0x808
#define TZPC_DECPROT1STAT	0x80C
#define TZPC_DECPROT1SET	0x810
#define TZPC_DECPROT1CLR	0x814
#define TZPC_DECPROT2STAT	0x818
#define TZPC_DECPROT2SET	0x81C
#define TZPC_DECPROT2CLR	0x820
#define TZPC_DECPROT3STAT	0x824
#define TZPC_DECPROT3SET	0x828
#define TZPC_DECPROT3CLR	0x82C

#define TZPC_PERIPHID0		0xFE0
#define TZPC_PERIPHID1		0xFE4
#define TZPC_PERIPHID2		0xFE8
#define TZPC_PERIPHID3		0xFEC

#define TZPC_PCELLID0		0xFF0
#define TZPC_PCELLID1		0xFF4
#define TZPC_PCELLID2		0xFF8
#define TZPC_PCELLID3		0xFFC

#define TZPC_FIMD0_M0		(0x1 << 1)
#define TZPC_FIMD0_M1		(0x1 << 2)
#define TZPC_FIMD0_M2		(0x1 << 2)
#define TZPC_FIMD1_M0		(0x1 << 4)
#define TZPC_FIMD1_M1		(0x1 << 5)
#define TZPC_FIMD1_M2		(0x1 << 5)

#define TZPC_GSCALER0_M		(0x1 << 1)
#define TZPC_GSCALER1_M		(0x1 << 3)
#define TZPC_GSCALER2_M		(0x1 << 5)
#define TZPC_GSCALER3_M		(0x1 << 7)
#define TZPC_GSCALER4_M		(0x1 << 1)

#define TZPC_GSCALER0_M_SHIFT	1
#define TZPC_GSCALER1_M_SHIFT	3
#define TZPC_GSCALER2_M_SHIFT	5
#define TZPC_GSCALER3_M_SHIFT	7
#define TZPC_GSCALER4_M_SHIFT	1

#define TZPC_MFC_M0		(0x1 << 0)
#define TZPC_MFC_M1		(0x1 << 1)

#define TZPC_SSS_M		(0x1 << 0)
#define TZPC_SSS_S		(0x1 << 6)

#define TZPC_SMMU_GSCALER0	(0x1 << 7)
#define TZPC_SMMU_GSCALER1	(0x1 << 0)
#define TZPC_SMMU_GSCALER2	(0x1 << 1)
#define TZPC_SMMU_GSCALER3	(0x1 << 2)
#define TZPC_SMMU_GSCALER4	(0x1 << 3)

#define TZPC_SMMU_MFC_M0	(0x1 << 7)
#define TZPC_SMMU_MFC_M1	(0x1 << 0)

#define TZPC_G2D_M		(0x1 << 2)
#define TZPC_SMMU_G2D		(0x1 << 3)

#endif	/* __REGS_TZPC_H__ */