#ifndef __ESE_PROTO_H__
#define __ESE_PROTO_H__

#define SPI_MAX_FRAME_SIZE              259
#define SPI_MAX_PAYLOAD_SIZE            255

#define ESE_CAP1_VAL                (0x10)

#define ESE_CAP2_16BITS             (1 << 2)
#define ESE_CAP2_IRQ                (1 << 3)

#define ESE_CAP45_CSDELAY_POS       (4)
#define ESE_CAP45_CSDELAY_MASK      (0xF)

#define ESE_CAP45_INTERBYTE_POS     (0)
#define ESE_CAP45_INTERBYTE_MASK    (0xF)

#define ESE_FRAME_GET_CAPABILITIES  0x80, 0x01, 0x10, 0x86, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
#define ESE_FRAME_CHECK_ALIVE       0x81, 0x01, 0x43, 0x44, 0x06
#define ESE_FRAME_ACK_APDU          0x81, 0x00, 0xAC, 0x65
#define ESE_FRAME_NACK_CRC_APDU     0x81, 0x01, 0x4E, 0xA1, 0xDD

#define ESE_FRAME_RESET_INTERFACE   0x81, 0x01, 0x50, 0x5E, 0x24


#define ESE_FRAME_NULL              0x00

#define ESE_PCB_SPI_CHANNEL         (0x00)
#define ESE_PCB_APDU_CHANNEL        (0x01)

#define ESE_PCB_BLOCK_CHAINED       (0x0)
#define ESE_PCB_BLOCK_LAST          (0x1)
#define ESE_PCB_BLOCK_CONTROL       (0x2)
#define ESE_PCB_BLOCK_LAST_END      (0x3)

#define ESE_PCB_BLOCK_SHIFT         6

#define ESE_CHK_BUSY                0x02

#define ESE_MAKE_PCB(block_type, channel) \
     (((block_type) << ESE_PCB_BLOCK_SHIFT) | ((channel) & 0x3F))

#define ESE_PCB_GET_TYPE(pcb)       (((pcb) >> ESE_PCB_BLOCK_SHIFT) & 0x3)
#define ESE_PCB_GET_CHANNEL(pcb)    ((pcb) & 0x3F)

#define next_apdu_frame(apdu, size, offset, frame, payloadsize) next_frame(apdu, size, offset, frame, ESE_PCB_APDU_CHANNEL, payloadsize)
#define next_spi_frame(apdu, size, offset, frame,payloadsize) next_frame(apdu, size, offset, frame, ESE_PCB_SPI_CHANNEL, payloadsize)

#endif // __ESE_PROTO_H__