#ifndef __SEC_SPI_INFO_H__ #define __SEC_SPI_INFO_H__ #ifdef USE_QSEE #include #endif #ifdef USE_MOBICORE #include "tlStd.h" #include "TlApi/TlApi.h" #include "tlapi_secdrv.h" #endif #ifdef USE_QSEE /************************* GRDM *************************/ #ifdef USE_GRDM #if defined(SM6115) #define GRDM_SPI_DEVICE_ID QSEE_SPI_DEVICE_6 // Use new SPI APIs for CS control //#define USE_ISPI_API #elif defined(SM6150) || defined(SM6150_SPF20) // QUP1 SE 2 #define GRDM_SPI_DEVICE_ID QSEE_SPI_DEVICE_7 // Use new SPI APIs for CS control //#define USE_ISPI_API #else // Default : 1 #define GRDM_SPI_DEVICE_ID QSEE_SPI_DEVICE_1 #endif // ESE_SPI_DEVICE_ID #endif /************************* GRDM *************************/ #if defined(MSM8996) // ESE_SPI_DEVICE_ID #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_11 #elif defined(MSM8952) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_8 #elif defined(SDM845) || defined(SM7225) || defined(SM7225_LA20) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_3 #elif defined(SM6150) || defined(SM6150_SPF20) // QUP1 SE 2 #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_7 #elif defined(SM7150) || defined(SM7150_SPF20) || defined(SM7250) // QUP0 SE 1 #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_2 #elif defined(SM8150) || defined(SM8150_FUSION) || defined(SM8150_FUSION_LA20) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_19 #elif defined(SM8250) || defined(SM8250_LA101) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_17 #elif defined(SM8350) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_15 #elif defined(SM8450) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_20 #elif defined(SM7325) #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_13 #else // Default : 1 #define ESE_SPI_DEVICE_ID QSEE_SPI_DEVICE_1 #endif // ESE_SPI_DEVICE_ID #if !defined(MSM8916) && !defined(MSM8936) // EXTENEDED_CONFIG #define EXTENEDED_CONFIG #ifndef MSM8996 #define EXTENDED_NEW_CONFIG #endif #endif // EXTENEDED_CONFIG #if defined(GEM) // Extra CS CONTROL for gemalto chip #if defined(MSM8956_PRO) || defined(MSM8996) || defined(MSM8953) #define CS_CONTROL #elif defined(MSM8998) || defined(SDM660) || defined(SDM660_SPF20) // Skip #else // Use ISPI APIs #define USE_ISPI_API #endif #endif // Extra CS CONTROL #if defined(MSM8916) || defined(MSM8936) || defined(MSM8952) || defined(MSM8956) // GPIO CONTROL TYPE #define GPIO_CONTROL extern int qsee_oem_process_cmd(unsigned char *, unsigned int,unsigned char *, unsigned int); typedef struct ese_oem_req_s { uint32_t cmd_id; unsigned char *data; } ese_oem_req_t; #define ESE_CS_ON 0x61 #define ESE_CS_OFF 0x62 #define ESE_OPEN_DATA 0x60 #define ESE_CLOSE_DATA 0x50 #else // GPIO CONTROL - TLMM #include "qsee_tlmm.h" #define TLMM_CONTROL #if defined(SM8250) || defined(SM8250_LA101) || defined(SM8350) || defined(SM8450) #define USE_ALWAYS_POWER_ON #endif #if defined(SDM710) || defined(SDM710_SPF21) || defined(SM8150) || defined(SM8150_FUSION) \ || defined(SM8150_FUSION_LA20) || defined(SM6150) || defined(SM7150) || defined(SM6150_SPF20)\ || defined(SM7150_SPF20) || defined(SM8250) || defined(SM8250_LA101) || defined(SM7250) \ || defined(SM8350) || defined(SM7225) || defined(SM7225_LA20) || defined(SM8450) || defined(SM7325) #define NOT_CONTROL_GPIO_CLOSE #endif #ifdef CS_CONTROL int eSEGpioCSEnable(); int eSEGpioCSDisable(); #endif #if defined(MSM8996) // BLSP_SPI_NAME for chipset #ifdef CS_CONTROL #define BLSP_SPI_MISO "oem_blsp_spi_miso[11]" #define BLSP_SPI_MOSI "oem_blsp_spi_mosi[11]" #define BLSP_SPI_CLK "oem_blsp_spi_clk[11]" #define BLSP_SPI_CS "oem_blsp_spi_cs_n[11]" #else #define BLSP_SPI_MISO "blsp_spi_miso[11]" #define BLSP_SPI_MOSI "blsp_spi_mosi[11]" #define BLSP_SPI_CLK "blsp_spi_clk[11]" #define BLSP_SPI_CS "blsp_spi_cs_n[11]" #endif // CS_CONTROL #elif defined(SDM845) #define BLSP_SPI_MISO "qup_l0[2]" #define BLSP_SPI_MOSI "qup_l1[2]" #define BLSP_SPI_CLK "qup_l2[2]" #define BLSP_SPI_CS "qup_l3[2]" #elif defined(SDM710) || defined(SDM710_SPF21) #define BLSP_SPI_MISO "qup_l0[0]" #define BLSP_SPI_MOSI "qup_l1[0]" #define BLSP_SPI_CLK "qup_l2[0]" #define BLSP_SPI_CS "qup_l3[0]" #elif defined(SM6150) || defined(SM6150_SPF20) #define BLSP_SPI_MISO "qup1_l0[2]" #define BLSP_SPI_MOSI "qup1_l1[2]" #define BLSP_SPI_CLK "qup1_l2[2]" #define BLSP_SPI_CS "qup1_l3[2]" #elif defined(SM7150) || defined(SM7150_SPF20) || defined(SM7250) #define BLSP_SPI_MISO "qup0_l0[1]" #define BLSP_SPI_MOSI "qup0_l1[1]" #define BLSP_SPI_CLK "qup0_l2[1]" #define BLSP_SPI_CS "qup0_l3[1]" #elif defined(SM8150) || defined(SM8150_FUSION) || defined(SM8150_FUSION_LA20) #define BLSP_SPI_MISO "qup_l0[18]" #define BLSP_SPI_MOSI "qup_l1[18]" #define BLSP_SPI_CLK "qup_l2[18]" #define BLSP_SPI_CS "qup_l3[18]" #elif defined(SM8250) || defined(SM8250_LA101) #define BLSP_SPI_MISO "qup_l0[16]" #define BLSP_SPI_MOSI "qup_l1[16]" #define BLSP_SPI_CLK "qup_l2[16]" #define BLSP_SPI_CS "qup_l3[16]" #elif defined(SM8350) #define BLSP_SPI_MISO "qup_l0[14]" #define BLSP_SPI_MOSI "qup_l1[14]" #define BLSP_SPI_CLK "qup_l2[14]" #define BLSP_SPI_CS "qup_l3[14]" #elif defined(SM7225) || defined(SM7225_LA20) #define BLSP_SPI_MISO "qup0_l0[2]" #define BLSP_SPI_MOSI "qup0_l1[2]" #define BLSP_SPI_CLK "qup0_l2[2]" #define BLSP_SPI_CS "qup0_l3[2]" #elif defined(SM8450) #define BLSP_SPI_MISO "qup_l0[19]" #define BLSP_SPI_MOSI "qup_l1[19]" #define BLSP_SPI_CLK "qup_l2[19]" #define BLSP_SPI_CS "qup_l3[19]" #elif defined(SM7325) #define BLSP_SPI_MISO "qup1_l0[4]" #define BLSP_SPI_MOSI "qup1_l1[4]" #define BLSP_SPI_CLK "qup1_l2[4]" #define BLSP_SPI_CS "qup1_l3[4]" #else // Default : 1 #ifdef CS_CONTROL #define BLSP_SPI_MISO "oem_blsp_spi_miso[1]" #define BLSP_SPI_MOSI "oem_blsp_spi_mosi[1]" #define BLSP_SPI_CLK "oem_blsp_spi_clk[1]" #define BLSP_SPI_CS "oem_blsp_spi_cs_n[1]" #else #define BLSP_SPI_MISO "blsp_spi_miso[1]" #define BLSP_SPI_MOSI "blsp_spi_mosi[1]" #define BLSP_SPI_CLK "blsp_spi_clk[1]" #define BLSP_SPI_CS "blsp_spi_cs_n[1]" #endif // CS_CONTROL #endif // BLSP_SPI_NAME for chipset #endif // GPIO CONTROL TYPE #endif // USE_QSEE #if defined USE_MOBICORE || defined USE_BLOWFISH #if defined(SPI_PORT_NUM_0) #define ESE_SPI_DEVICE_ID 0 #elif defined(SPI_PORT_NUM_1) #define ESE_SPI_DEVICE_ID 1 #elif defined(SPI_PORT_NUM_6) #define ESE_SPI_DEVICE_ID 6 #elif defined(SPI_PORT_NUM_2) #define ESE_SPI_DEVICE_ID 2 #elif defined(SPI_PORT_NUM_3) #define ESE_SPI_DEVICE_ID 3 #else #define ESE_SPI_DEVICE_ID 3 #endif /************************* GRDM *************************/ #ifdef USE_GRDM #define GRDM_SPI_DEVICE_ID 0 #endif /************************* GRDM *************************/ #endif #ifdef USE_GRDM #define GRDM_SPI_MAX_FREQ 6500000 #endif #ifdef COMMON_VENDOR #define SPI_MAX_FREQ 6500000 #define SPI_MAX_FREQ_NXP 7000000 #define SPI_MAX_FREQ_NXP_12M 12000000 #define SPI_MAX_FREQ_NXP_20M 20000000 #define SPI_MAX_FREQ_GEM 6500000 #define SPI_MAX_FREQ_GEM_UT60 12500000 #else #ifdef OT #define SPI_MAX_FREQ 6500000 #endif #if defined(NXPV4) #define SPI_MAX_FREQ 7000000 #define SPI_MAX_FREQ_12M 12000000 #define SPI_MAX_FREQ_20M 20000000 #elif defined(NXP) #define SPI_MAX_FREQ 1000000 #endif #if defined(GEM60) #define SPI_MAX_FREQ 12500000 #elif defined(GEM) #define SPI_MAX_FREQ 6500000 #endif #endif #endif /* __SEC_SPI_INFO_H__ */