/* * Copyright 2012-2019, Samsung Electronics Co. Ltd * This software is proprietary of Samsung Electronics. * No part of this software, either material or conceptual may be copied or * distributed, transmitted, * transcribed, stored in a retrieval system or translated into any human * or computer language in any form by any means, * electronic, mechanical, manual or otherwise, or disclosed * to third parties without the express written permission of Samsung * Electronics. */ #ifndef _REGS_DISP_SS_H #define _REGS_DISP_SS_H #define GLOBAL_CONTROL 0x0000 #define GLOBAL_CONTROL_SRESET (1 << 28) #define GLOBAL_CONTROL_OPERATION_MODE_F (1 << 8) #define GLOBAL_CONTROL_OPERATION_MODE_RGBIF_F (0 << 8) #define GLOBAL_CONTROL_OPERATION_MODE_I80IF_F (1 << 8) #define GLOBAL_CONTROL_IDLE_STATUS (1 << 5) #define GLOBAL_CONTROL_RUN_STATUS (1 << 4) #define GLOBAL_CONTROL_DECON_EN (1 << 1) #define GLOBAL_CONTROL_DECON_EN_F (1 << 0) #define GLOBAL_CONTROL_SECURE_MODE_F (1 << 0) #define SRAM_SHARE_ENABLE 0x0030 #define FLOATING_SRAM_SHARE_ENABLE_F (1 << 24) #define FF2_SRAM_SHARE_ENABLE_F (1 << 20) #define FF1_SRAM_SHARE_ENABLE_F (1 << 16) #define FF0_SRAM_SHARE_ENABLE_F (1 << 12) #define ALL_SRAM_SHARE_ENABLE (0x1111 << 12) #define INTERRUPT_ENABLE 0x0040 #define DPU_MDNIE_DIMMING_END_INT_EN (1 << 25) #define DPU_MDNIE_DIMMING_START_INT_EN (1 << 24) #define DPU_DQE_DIMMING_END_INT_EN (1 << 21) #define DPU_DQE_DIMMING_START_INT_EN (1 << 20) #define DPU_FRAME_DONE_INT_EN (1 << 13) #define DPU_FRAME_START_INT_EN (1 << 12) #define DPU_FIFO_SEL_FIFO0 (0 << 9) #define DPU_FIFO_SEL_FIFO1 (1 << 9) #define DPU_UNDER_FLOW_INT_EN (1 << 8) #define DPU_EXTRA_INT_EN (1 << 4) #define DPU_INT_EN (1 << 0) #define INTERRUPT_ENABLE_MASK 0x3303711 #define EXTRA_INTERRUPT_ENABLE 0x0044 #define DPU_RESOURCE_CONFLICT_INT_EN (1 << 8) #define DPU_TIME_OUT_INT_EN (1 << 4) #define DPU_ERROR_INT_EN (1 << 0) #define INTERRUPT_PENDING 0x004C #define DPU_MDNIE_DIMMING_END_INT_PEND (1 << 25) #define DPU_MDNIE_DIMMING_START_INT_PEND (1 << 24) #define DPU_DQE_DIMMING_END_INT_PEND (1 << 21) #define DPU_DQE_DIMMING_START_INT_PEND (1 << 20) #define DPU_FRAME_DONE_INT_PEND (1 << 13) #define DPU_FRAME_START_INT_PEND (1 << 12) #define DPU_UNDER_FLOW_INT_PEND (1 << 8) #define DPU_EXTRA_INT_PEND (1 << 4) #define EXTRA_INTERRUPT_PENDING 0x0050 #define DPU_RESOURCE_CONFLICT_INT_PEND (1 << 8) #define DPU_TIME_OUT_INT_PEND (1 << 4) #define DPU_ERROR_INT_PEND (1 << 0) #define SHADOW_REG_UPDATE_REQ 0x0060 #define SHADOW_REG_UPDATE_REQ_GLOBAL (1U << 31) #define SHADOW_REG_UPDATE_REQ_DQE (1 << 28) #define SHADOW_REG_UPDATE_REQ_MDNIE (1 << 24) #define SHADOW_REG_UPDATE_REQ_WIN(_win) (1 << (_win)) #define SHADOW_REG_UPDATE_REQ_FOR_DECON0 (0xf) #define HW_SW_TRIG_CONTROL 0x0070 #define HW_TRIG_SEL(_v) ((_v) << 24) #define HW_TRIG_SEL_MASK (0x3 << 24) #define HW_TRIG_SEL_FROM_USB (3 << 24) #define HW_TRIG_SEL_FROM_DDI2 (2 << 24) #define HW_TRIG_SEL_FROM_DDI1 (1 << 24) #define HW_TRIG_SEL_FROM_DDI0 (0 << 24) #define HW_TRIG_SKIP(_v) ((_v) << 16) #define HW_TRIG_SKIP_MASK (0xff << 16) #define TRIG_AUTO_MASK_EN (1 << 12) #define SW_TRIG_EN (1 << 8) #define HW_TRIG_EDGE_POLARITY (1 << 7) #define HW_TRIG_MASK_DECON (1 << 4) #define HW_SW_TRIG_TIMER_CLEAR (1 << 3) #define HW_SW_TRIG_TIMER_EN (1 << 2) #define HW_TRIG_EN (1 << 0) #define HW_SW_TRIG_TIMER 0x0074 #define CLOCK_CONTROL_0 0x00F0 /* [24] QACTIVE_VALUE = 0 * 0: QACTIVE is dynamically changed by DECON h/w, * 1: QACTIVE is stuck to 1'b1 * [22][20][16][12]+[8][0] AUTO_CG_EN_xxx */ #define CLOCK_CONTROL_0_F_MASK (0x00511101) #define CLOCK_CONTROL_0_S_MASK (0x00511000) #define CLOCK_CONTROL_0_T_MASK (0x00511000) #define SPLITTER_SIZE_CONTROL_0 0x0100 #define SPLITTER_HEIGHT_F(_v) ((_v) << 16) #define SPLITTER_HEIGHT_MASK (0x3fff << 16) #define SPLITTER_HEIGHT_GET(_v) (((_v) >> 16) & 0x3fff) #define SPLITTER_WIDTH_F(_v) ((_v) << 0) #define SPLITTER_WIDTH_MASK (0x3fff << 0) #define SPLITTER_WIDTH_GET(_v) (((_v) >> 0) & 0x3fff) #define SPLITTER_SIZE_CONTROL_1 0x0104 #define FRAME_FIFO_0_SIZE_CONTROL_0 0x0120 #define FRAME_FIFO_HEIGHT_F(_v) ((_v) << 16) #define FRAME_FIFO_HEIGHT_MASK (0x3fff << 16) #define FRAME_FIFO_HEIGHT_GET(_v) (((_v) >> 16) & 0x3fff) #define FRAME_FIFO_WIDTH_F(_v) ((_v) << 0) #define FRAME_FIFO_WIDTH_MASK (0x3fff << 0) #define FRAME_FIFO_WIDTH_GET(_v) (((_v) >> 0) & 0x3fff) #define FRAME_FIFO_0_SIZE_CONTROL_1 0x0124 #define FRAME_FIFO_TH_CONTROL_0 0x0130 #define FRAME_FIFO_1_TH_F(_v) ((_v) << 16) #define FRAME_FIFO_1_TH_MASK (0xffff << 16) #define FRAME_FIFO_1_TH_GET(_v) (((_v) >> 16) & 0xffff) #define FRAME_FIFO_0_TH_F(_v) ((_v) << 0) #define FRAME_FIFO_0_TH_MASK (0xffff << 0) #define FRAME_FIFO_0_TH_GET(_v) (((_v) >> 0) & 0xffff) #define FORMATTER_CONTROL 0x0190 #define FORMATTER_PIXEL0123_ORDER_SWAP_F (1 << 16) #define FORMATTER_PIXEL23_ORDER_SWAP_F (1 << 12) #define FORMATTER_PIXEL01_ORDER_SWAP_F (1 << 8) #define FORMATTER_PIXEL_ORDER_SWAP(_a, _b, _c) (_a << 16) | (_b << 12) | (_c << 8) #define FORMATTER_PIXEL_ORDER_SWAP_MASK ((1 << 16) | (1 << 12) | (1 << 8)) #define FORMATTER_OUT_RGB_ORDER_F(_v) ((_v) << 4) #define FORMATTER_OUT_RGB_ORDER_MASK (0x7 << 4) #define FORMATTER0_SIZE_CONTROL_0 0x01A0 #define FORMATTER_HEIGHT_F(_v) ((_v) << 16) #define FORMATTER_HEIGHT_MASK (0x3fff << 16) #define FORMATTER_HEIGHT_GET(_v) (((_v) >> 16) & 0x3fff) #define FORMATTER_WIDTH_F(_v) ((_v) << 0) #define FORMATTER_WIDTH_MASK (0x3fff << 0) #define FORMATTER_WIDTH_GET(_v) (((_v) >> 0) & 0x3fff) #define FORMATTER0_SIZE_CONTROL_1 0x01A4 #define BLENDER_BG_IMAGE_SIZE_0 0x0200 #define BLENDER_BG_HEIGHT_F(_v) ((_v) << 16) #define BLENDER_BG_HEIGHT_MASK (0x3fff << 16) #define BLENDER_BG_HEIGHT_GET(_v) (((_v) >> 16) & 0x3fff) #define BLENDER_BG_WIDTH_F(_v) ((_v) << 0) #define BLENDER_BG_WIDTH_MASK (0x3fff << 0) #define BLENDER_BG_WIDTH_GET(_v) (((_v) >> 0) & 0x3fff) #define BLENDER_BG_IMAGE_SIZE_1 0x0204 #define DATA_PATH_CONTROL_0 0x0214 #define WIN_MAPCOLOR_EN_F(_win) (1 << (4 * _win + 1)) #define WIN_EN_F(_win) (1 << (4 * _win + 0)) #define DATA_PATH_CONTROL_2 0x0230 #define DQE_LPD_EXIT_CTRL (1 << 24) #define HSC_PATH_F(_v) ((_v) << 20) #define HSC_PATH_MASK (0x7 << 20) #define APS_PATH_F(_v) ((_v) << 16) #define APS_PATH_MASK (0x7 << 16) #define ENHANCE_LOGIC_PATH_F(_v) ((_v) << 12) #define ENHANCE_LOGIC_PATH_MASK (0x7 << 12) #define ENHANCE_LOGIC_PATH_GET(_v) (((_v) >> 12) & 0x7) #define COMP_LINKIF_WB_PATH_F(_v) ((_v) << 0) #define COMP_LINKIF_WB_PATH_MASK (0x1ff << 0) #define COMP_LINKIF_WB_PATH_GET(_v) (((_v) >> 0) & 0x1ff) #define WIN_CONTROL_0(_win) (0x1000 + ((_win) * 0x30)) #define WIN_ALPHA1_F(_v) (((_v) & 0xFF) << 24) #define WIN_ALPHA1_MASK (0xFFU << 24) #define WIN_ALPHA0_F(_v) (((_v) & 0xFF) << 16) #define WIN_ALPHA0_MASK (0xFF << 16) #define WIN_ALPHA_GET(_v, _n) (((_v) >> (16 + 8 * (_n))) & 0xFF) #define WIN_FUNC_F(_v) (((_v) & 0xF) << 8) #define WIN_FUNC_MASK (0xF << 8) #define WIN_FUNC_GET(_v) (((_v) >> 8) & 0xf) #define WIN_SRESET (1 << 4) #define WIN_ALPHA_MULT_SRC_SEL_F(_v) (((_v) & 0x3) << 0) #define WIN_ALPHA_MULT_SRC_SEL_MASK (0x3 << 0) #define WIN_CONTROL_1(_win) (0x1004 + ((_win) * 0x30)) #define WIN_FG_ALPHA_D_SEL_F(_v) (((_v) & 0xF) << 24) #define WIN_FG_ALPHA_D_SEL_MASK (0xF << 24) #define WIN_BG_ALPHA_D_SEL_F(_v) (((_v) & 0xF) << 16) #define WIN_BG_ALPHA_D_SEL_MASK (0xF << 16) #define WIN_FG_ALPHA_A_SEL_F(_v) (((_v) & 0xF) << 8) #define WIN_FG_ALPHA_A_SEL_MASK (0xF << 8) #define WIN_BG_ALPHA_A_SEL_F(_v) (((_v) & 0xF) << 0) #define WIN_BG_ALPHA_A_SEL_MASK (0xF << 0) #define WIN_START_POSITION(_win) (0x1008 + ((_win) * 0x30)) #define WIN_STRPTR_Y_F(_v) (((_v) & 0x3FFF) << 16) #define WIN_STRPTR_X_F(_v) (((_v) & 0x3FFF) << 0) #define WIN_END_POSITION(_win) (0x100C + ((_win) * 0x30)) #define WIN_ENDPTR_Y_F(_v) (((_v) & 0x3FFF) << 16) #define WIN_ENDPTR_X_F(_v) (((_v) & 0x3FFF) << 0) #define WIN_COLORMAP_0(_win) (0x1010 + ((_win) * 0x30)) #define WIN_MAPCOLOR_A_F(_v) ((_v) << 16) #define WIN_MAPCOLOR_A_MASK (0xff << 16) #define WIN_MAPCOLOR_R_F(_v) ((_v) << 0) #define WIN_MAPCOLOR_R_MASK (0xff << 0) #define WIN_COLORMAP_1(_win) (0x1014 + ((_win) * 0x30)) #define WIN_MAPCOLOR_G_F(_v) ((_v) << 16) #define WIN_MAPCOLOR_G_MASK (0xff << 16) #define WIN_MAPCOLOR_B_F(_v) ((_v) << 0) #define WIN_MAPCOLOR_B_MASK (0xff << 0) #define WIN_START_TIME_CONTROL(_win) (0x1018 + ((_win) * 0x30)) #define WIN_START_TIME_CONTROL_F(_v) ((_v) << 0) #define WIN_START_TIME_CONTROL_MASK (0x3fff << 0) #define WIN_PIXEL_COUNT(_win) (0x101C + ((_win) * 0x30)) #endif /* _REGS_DISP_SS_H */