/*
 *
 * Copyright (C) 2012-2021, Samsung Electronics Co., Ltd.
 *
 * Board base registers and structures
 */

#ifndef __BOARD_H__
#define __BOARD_H__

#include "base.h"

#define USE_TOUCH_INTERRUPT

/* Display constants */
#define BOARD_GRAYSCALE_DEPTH              8
#define BOARD_REDBITDEPTH                  8
#define BOARD_GREENBITDEPTH                8
#define BOARD_BLUEBITDEPTH                 8
#define BOARD_ALPHABITDEPTH                8
#define BOARD_BITSPERPIXEL                 32 /* RGBA */

#define BOARD_WDENSITY                     368 /* Pixel/inch - approximate value. Official size is 5.7" diagonal */
#define BOARD_HDENSITY                     368 /* Pixel/inch - approximate value. Official size is 5.7" diagonal */

#define FB_ALIGN                           SIZE_4KB

/* Define for specific values which are dependent by model */
#define SENSOR_MAX_X_DEFAULT               4096
#define SENSOR_MAX_Y_DEFAULT               4096

/* =============================================== */
/* Board memory map */
/* Display controller(DECON) */
#define DISP_DECON_MAIN_BASE    0x16100000 /* Display controller(DECON) */
#define DISP_DECON_WIN_BASE     0x16110000 /* Display controller(DECON) */
#define DISP_DECON_WINCON_BASE  0x16130000 /* Display controller(DECON) */
#define DISP_DPP_SEC_BASE       0x160D0000 /* Display controller(DECON) */
#define DISP_IDMA_SEC_BASE      0x160B0000 /* Display controller(DECON) */

#define DISP_MIPI_BASE          0x16080000 /* Display controller(DECON) */
#define DISP_IDMA_COMMON_BASE   0x160B0000 /* Display controller(DECON) */

#define SMMUDECON0_BASE         0x16030000 /* Display system MMU */

/* I2C driver name for touch interface */
#define TOUCH_I2C_DRVNAME                  "/dev/hsi2c/hsi2c0"
/* SPI driver name for touch interface */
#define TOUCH_SPI_DRVNAME                  "/dev/spi/spi1"

/* Touch IC Address */
#define SEC_I2C_ADDR                       0x48
#define STM_I2C_ADDR                       0x49
#define TOUCH_IC_ADDR                      SEC_I2C_ADDR

/* Interrupt IDs */
#define NUM_SGI                            16
#define NUM_PPI                            16
#define SPI_IRQ(x)                         (NUM_SGI + NUM_PPI + x)

/* EXT_INTA1_OUT0, SPI[57] */
#define TOUCH_INT_NUM                      (SPI_IRQ(10)) /* XEINT_10/GPA1_2*/

/* GPIO registers and bits */
#define GPIO_PA_BASE                       0x15850000 /* for TSP_INT (GPA1_2) */
#define TZPC_GPIO_PA_BASE                  0x10852000 /* TZPC setting register for GPA1 */

/* GPA1[2] , XEINT_10/WAKE_EXT_INTA1[2] */
#define GPA1_CON_OFFSET                    0x0020
#define GPA1_2_CONF_MASK                   (0xFu << 8)
#define GPA1_2_CONF_EINT                   (0xFu << 8)

#define WEINT_GPA1_CON_OFFSET              0x0704
#define GPA1_EINT2_MASK                    (0x7u << 8)
#define GPA1_EINT2_LOW                     (0x0u << 8)
#define GPA1_EINT2_HIGH                    (0x1u << 8)
#define GPA1_EINT2_FALL                    (0x2u << 8)
#define GPA1_EINT2_RISE                    (0x3u << 8)

#define WEINT_GPA1_MASK_OFFSET             0x0904

#define WEINT_GPA1_PEND_OFFSET             0x0A04
#define WEINT_MASK_BIT(x)                  (0x1 << (x))
#define WEINT_GPA1_2                       2
#define WEINT_GPA1_2_PEND                  WEINT_MASK_BIT(WEINT_GPA1_2)

#endif /* __BOARD_H__ */