/**
 * @file   regs-gpio-fp.h
 * @brief  GPIO register file for driver(Fingerprint)
 *
 * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd.
 */

#ifndef __REGS_GPIO_FP_H__
#define __REGS_GPIO_FP_H__


/************************************************************************/
/* TZPC SFR Address                                                     */
/************************************************************************/
#if defined(CONFIG_EXYNOS7420) || defined(CONFIG_EXYNOS5433) || defined(CONFIG_EXYNOS5430)
#define TZPC0_SFR_BASE		0x10100000
#define TZPC1_SFR_BASE		0x10110000
#define TZPC2_SFR_BASE		0x10120000
#define TZPC3_SFR_BASE		0x10130000
#define TZPC4_SFR_BASE		0x10140000
#define TZPC5_SFR_BASE		0x10150000
#define TZPC6_SFR_BASE		0x10160000
#define TZPC7_SFR_BASE		0x10170000
#define TZPC8_SFR_BASE		0x10180000
#define TZPC9_SFR_BASE		0x10190000
#define TZPC10_SFR_BASE		0x100D0000
#define TZPC11_SFR_BASE		0x100E0000
#define TZPC12_SFR_BASE		0x100F0000
#if defined(CONFIG_EXYNOS7420)
#define TZPC13_SFR_BASE		0x10080000
#define TZPC14_SFR_BASE		0x10090000
#define TZPC15_SFR_BASE		0x100A0000
#endif
#elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420)
#define TZPC0_SFR_BASE		0x10100000
#define TZPC1_SFR_BASE		0x10110000
#define TZPC2_SFR_BASE		0x10120000
#define TZPC3_SFR_BASE		0x10130000
#define TZPC4_SFR_BASE		0x10140000
#define TZPC5_SFR_BASE		0x10150000
#define TZPC6_SFR_BASE		0x10160000
#define TZPC7_SFR_BASE		0x10170000
#define TZPC8_SFR_BASE		0x10180000
#define TZPC9_SFR_BASE		0x10190000
#define TZPC10_SFR_BASE		0x100E0000
#define TZPC11_SFR_BASE		0x100F0000
#endif

#define TZPC_DECPROT0STAT	0x800
#define TZPC_DECPROT0SET	0x804
#define TZPC_DECPROT0CLR	0x808
#define TZPC_DECPROT1STAT	0x80C
#define TZPC_DECPROT1SET	0x810
#define TZPC_DECPROT1CLR	0x814
#define TZPC_DECPROT2STAT	0x818
#define TZPC_DECPROT2SET	0x81C
#define TZPC_DECPROT2CLR	0x820
#define TZPC_DECPROT3STAT	0x824
#define TZPC_DECPROT3SET	0x828
#define TZPC_DECPROT3CLR	0x82C


/************************************************************************/
/* TZPC control Register                                                */
/************************************************************************/
#if defined(CONFIG_EXYNOS7420)
/* SPI - DECPROT3 */
#define TZPC_SPI0_M			(0x1 << 0)
#define TZPC_SPI1_M			(0x1 << 1)
#define TZPC_SPI2_M			(0x1 << 2)
#define TZPC_SPI3_M			(0x1 << 3)
#define TZPC_SPI4_M			(0x1 << 4)

/* GPIO - DECPROT1 */
#define TZPC_GPIO_ESE_M		(0x1 << 0)

#elif defined(CONFIG_EXYNOS5433) || defined(CONFIG_EXYNOS5430)
/* SPI - DECPROT0 */
#define TZPC_SPI0_M			(0x1 << 5)
#define TZPC_SPI1_M			(0x1 << 6)
#define TZPC_SPI2_M			(0x1 << 7)

#if defined(CONFIG_EXYNOS5433)
/* GPIO - DECPROT2 */
#define TZPC_GPIO_FINGER	(0x1 << 6)
#endif

#elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420)
/* SPI - DECPROT2 */
#define TZPC_SPI0_M			(0x1 << 4)
#define TZPC_SPI1_M			(0x1 << 5)
#define TZPC_SPI2_M			(0x1 << 6)

#endif

/************************************************************************/
/* GPIO control Register                                                */
/************************************************************************/
#if defined(CONFIG_EXYNOS7420)
/* GPV7 */
#define GPIO_ESE_SFR_BASE		0x14CA0000
#elif defined(CONFIG_EXYNOS5433)
/* GPD5 */
#define GPIO_FINGER_SFR_BASE	0x14CB0000
#elif defined(CONFIG_EXYNOS5430)
/* GPD5 */
#define GPIO_PERIC_SFR_BASE		0x14CC0000
#elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420)
/* GPA2 */
#define GPIO_BLOCK_SFR_BASE		0x14010000
#endif

#if defined(CONFIG_EXYNOS7420) || defined(CONFIG_EXYNOS5433)
#define GPIOCON		0x0000
#define GPIODAT		0x0004
#define GPIOPUD		0x0008
#define GPIODRV		0x000C
#define GPIOCONPDN	0x0010
#define GPIOPUDPDN	0x0014
#elif defined(CONFIG_EXYNOS5430)
#define GPIOCON		0x0160
#define GPIODAT		0x0164
#define GPIOPUD		0x0168
#define GPIODRV		0x016C
#define GPIOCONPDN	0x0170
#define GPIOPUDPDN	0x0174
#elif defined(CONFIG_EXYNOS5422) || defined(CONFIG_EXYNOS5420)
#define GPIOCON		0x0040
#define GPIODAT		0x0044
#define GPIOPUD		0x0048
#define GPIODRV		0x004C
#define GPIOCONPDN	0x0050
#define GPIOPUDPDN	0x0054
#endif

#endif /* __REGS_GPIO_FP_H__ */
