sdx50m 1.0 0x000a0000 ROW 38, 39, 40, 41

0x000a0130

BLOW Blow this bit after the SKDK has been provisioned to secure the secondary key from being read back. A secure path hardware exists from SKDK to the crypto engine. QTI 0x1 10 Disable further QFPROM changes to the this region. Blow this bit only if no further changes to Rd/Wr Permissions are needed. QTI 0x1 34 Disables further QFPROM changes to the this region. Blow this bit after the region has been provisioned QTI 0x1 38 Disables further QFPROM changes to the this region. Blow this bit after the region has been provisioned QTI 0x1 42 Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. QTI 0x1 43 Disables further QFPROM changes to the this region. Blow this bit after the region has been provisioned. QTI 0x1 45 Disables further QFPROM changes to the this region. Blow this bit after the region has been completely provisioned. QTI 0x1 50

0x000a0150

BLOW OEM Optional. Disables emergency download via removable SD and/or USB downloader in Apps PBL error handler. QTI 0x0 0 OEM optional. BOOT ROM must support USB enumeration timeout. Timeout applies to both enumeration for FLCB (fast low current boot) and USB download mode. If USB is not enumerated within time (90 seconds); quit USB enumeration If USB suspend or disconnected after enumeration; start timer again. QTI 0x0 1 Indicates that the RPMB Key has been already provisioned. QTI 0x0 2 OEM optional. If FORCE_DLOAD_DISABLE is '0'; device goes to download mode if an error occurs very early in XBL1. If FORCE_DLOAD_DISABLE is set to '1'; device goes into cold boot if an error occurs very early in XBL1. If this fuse is set to '1', FORCE_USB_BOOT GPIO state is not read during boot. QTI 0x0 3 These fuses are used by boot code to specify which device has priority to be booted from. Mapping is as follows: 0x1:PCIe 0x2:USB QTI 0x1 7:5 This bit disables the SPDM from monitoring bus traffic. QTI 0x0 11 Used for controlling logging mechanism in PBL. '1' To limit the information collected in PBL logs. QTI 0x0 22 Debug Policy is bypassed when this bit is 1. Debug Policy provides a means to re-enable debug capabilities under OEM-specified selectable conditions. QTI 0x0 30 This fuse is used to disable X509 OU Field Parsing. For now only disabling of Crash dump OU Field is done. QTI 0x0 31 This fuse permanently disables all debug of the chip. It is not recommended to blow this bit. No RMAs are possible after this fuse is blown. QTI 0x0 32 Blow this bit for secure solution. Disables the MSS global invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 33 Blow this bit for secure solution. Disables the MSS global non-invasive (trace and performance monitoring) debug capabilities. Can be overriden with OVERRIDE registers. QTI 0x1 34 Blow this bit for secure solution. Disables the WCSS global invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 35 Blow this bit for secure solution. Disables the RPM global invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 36 Used in internal logic that generates RPM and WCSS NIDENs. QTI 0x1 37 Blow this bit for secure solution. Disables the RPM DAPEN capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 38 Blow this bit for secure solution. Disables the VENUS global invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 39 Blow this bit for secure solution. Disables the APPS Secure privileged invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 44 Blow this bit for secure solution. Disables the APPS Secure privileged non-invasive (trace and performance monitoring) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 45 Blow this bit for secure solution. Disables the DAP global invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 46 Blow this bit for secure solution. Disables the DAP global non-invasive (trace and performance monitoring) debug capabilities. Can be overriden with OVERRIDE registers. QTI 0x1 47 Blow this bit for secure solution. Disables the DAP Secure privileged invasive (JTAG and monitor mode) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 48 Blow this bit for secure solution. Disables the DAP Secure privileged non-invasive (trace and performance monitoring) debug capabilities. Can be overridden by OVERRIDE registers. QTI 0x1 49 Blow this bit for secure solution. Disables the DAP Device Enable. Can be overridden by OVERRIDE registers. QTI 0x1 50 Bit 0 - BOOT_ANTI_ROLLBACK_EN Bit 1 - TZAPPS_ANTI_ROLLBACK_EN Bit 2 - PILSUBSYS_ANTI_ROLLBACK_EN Bit 3 - MSA_ANTI_ROLLBACK_EN QTI 0xf 54:51 SNOC2MSS_DISABLE QTI 0x1 55 Debug test bus disable QTI 0x1 60 DCC feature disable QTI 0x1 61 Disable ECC in HW QTI 0x0 62

0x000a0158

BLOW PCIe/USB product ID QTI 0x0000 47:32 PCIe/USB vendor ID QTI 0x0000 63:48 ROW 60

0x000a01e0

BLOW Blow this bit to enable secure boot for apps and other peripheral images. When this bit is '1'; enables authentication for any code that references secure boot configuration 1. QTI 0x1 5 Blow this bit to enable secure boot for apps and other peripheral images. When this bit is '1'; enables authentication for any code that references secure boot configuration 2. QTI 0x1 13 Blow this bit to enable secure boot for apps and other peripheral images. When this bit is '1'; enables authentication for any code that references secure boot configuration 3. QTI 0x1 21