/*===========================================================================

FILE:        ul_data.c

DESCRIPTION: This file implements the target-specific NPA Bus subnodes

   Copyright (c) 2018 QUALCOMM Technologies, Incorporated.
             All Rights Reserved
             QUALCOMM Proprietary/GTDR
-------------------------------------------------------------------------------

$Header: //components/rel/boot.xf/3.2/QcomPkg/SocPkg/8250/Settings/ICB/core/ul_data.c#5 $ 
$DateTime: 2018/10/24 13:05:38 $
$Author: pwbldsvc $
$Change: 17449705 $

                      EDIT HISTORY FOR FILE

 Autogenerated for target: UEFI
 This file was generated using Autogen script: 
 gen.py

 when         who     what, where, why
 ----------   ---     -----------------------------------------------------------
 2018/10/17 Autogen  Autogenerated version

=============================================================================*/
#include "../../../../../Library/ICBArbLib/ul_i.h"
#include "../../../../../Library/ICBArbLib/ul_tree.h"
#include "../../../../../Library/ICBArbLib/icb_soc_data.h"

/****************************************************************************/
/*                              HLOS RSC                                    */
/****************************************************************************/

/****************************************************************************/
/*                              BUSES                                       */
/****************************************************************************/
/**** Bus: aggre1_noc ****/
static HAL_noc_InfoType aggre1_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x2000, /* QoS offset */
  0x1000, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_aggre1_noc =
{
  NULL, /* HWIO base: +AGGRE_NOC_A1NOC_SERVICE_NETWORK unused, no qos to configure */
  0, /* base address */
  0x1F180, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&aggre1_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: aggre2_noc ****/
static HAL_noc_InfoType aggre2_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x3000, /* QoS offset */
  0x1000, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_aggre2_noc =
{
  NULL, /* HWIO base: +AGGRE_NOC_A2NOC_SERVICE_NETWORK unused, no qos to configure */
  0, /* base address */
  0x3D180, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&aggre2_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: camnoc_virt ****/

static icb_bus_def_type bus_camnoc_virt =
{
  NULL, /* HWIO base unused for virtual bus */
  0, /* base address */
  0x0, /* HWIO region size */
  ICB_BUS_VIRT, /* Bus type */
  NULL, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: compute_noc ****/
static HAL_noc_InfoType compute_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x33000, /* QoS offset */
  0x800, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_compute_noc =
{
  NULL, /* HWIO base: +AGGRE_NOC_A2NOC_SERVICE_NETWORK unused, no qos to configure */
  0, /* base address */
  0x3D180, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&compute_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: config_noc ****/
static HAL_noc_InfoType config_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x0, /* QoS offset */
  0x0, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_config_noc =
{
  NULL, /* HWIO base: +CNOC_SERVICE_NETWORK unused, no qos to configure */
  0, /* base address */
  0xA580, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&config_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: dc_noc ****/
static HAL_noc_InfoType dc_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x0, /* QoS offset */
  0x0, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_dc_noc =
{
  NULL, /* HWIO base: +DC_NOCDC_NOC unused, no qos to configure */
  0, /* base address */
  0x4200, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&dc_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: gem_noc ****/
static HAL_noc_InfoType gem_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x21000, /* QoS offset */
  0x1000, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_gem_noc =
{
  NULL, /* HWIO base: +GEMNOC_GEM_NOC unused, no qos to configure */
  0, /* base address */
  0xAE200, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&gem_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: mc_virt ****/

static icb_bus_def_type bus_mc_virt =
{
  NULL, /* HWIO base unused for virtual bus */
  0, /* base address */
  0x0, /* HWIO region size */
  ICB_BUS_VIRT, /* Bus type */
  NULL, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: mmss_noc ****/
static HAL_noc_InfoType mmss_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0xa000, /* QoS offset */
  0x800, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_mmss_noc =
{
  NULL, /* HWIO base: MMSS_NOC unused, no qos to configure */
  0, /* base address */
  0x1F080, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&mmss_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: npu_noc ****/
static HAL_noc_InfoType npu_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x0, /* QoS offset */
  0x0, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_npu_noc =
{
  NULL, /* HWIO base: +NPU_NOC_NPU_NOC unused, no qos to configure */
  0, /* base address */
  0x1600, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&npu_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/**** Bus: system_noc ****/
static HAL_noc_InfoType system_noc_hal_info =
{
  0,        /* Base address */
  0, /* Number of masters with QoS */ 
  0x12000, /* QoS offset */
  0x1000, /* QoS block size */
  0x0, /* Disable sbm offset */
};

static icb_bus_def_type bus_system_noc =
{
  NULL, /* HWIO base: SYSTEM_NOC unused, no qos to configure */
  0, /* base address */
  0x1C200, /* HWIO region size */
  ICB_BUS_NOC, /* Bus type */
  (void *)&system_noc_hal_info, /* Bus info structure */
  0,    /* No enable/disable config clocks. */
  NULL,
  NULL,
  0,    /* No power domains. */
  NULL,
  NULL,
};

/****************************************************************************/
/*                              HW NODES                                    */
/****************************************************************************/
static icb_hw_request_type *hw_node_acv_requests[1];
static icb_hw_request_type *hw_node_acv_queries[1];

static icb_hw_node_type hw_node_acv =
{
  "ACV",
  ICB_HW_NODE_KIND_VECTOR,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0x8, /* output state */
  { NULL, ICB_HW_VECTOR_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_acv_requests }, /* request list */
  { 0, 1, hw_node_acv_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_node_type hw_node_alc =
{
  "ALC",
  ICB_HW_NODE_KIND_RAW,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_NO_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 0, NULL }, /* request list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_mc0_requests[1];
static icb_hw_request_type *hw_node_mc0_queries[1];

static icb_hw_node_type hw_node_mc0 =
{
  "MC0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_mc0_requests }, /* request list */
  { 0, 1, hw_node_mc0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sh0_requests[1];
static icb_hw_request_type *hw_node_sh0_queries[1];

static icb_hw_node_type hw_node_sh0 =
{
  "SH0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sh0_requests }, /* request list */
  { 0, 1, hw_node_sh0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_mm0_requests[1];
static icb_hw_request_type *hw_node_mm0_queries[1];

static icb_hw_node_type hw_node_mm0 =
{
  "MM0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_mm0_requests }, /* request list */
  { 0, 1, hw_node_mm0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_ce0_requests[1];
static icb_hw_request_type *hw_node_ce0_queries[1];

static icb_hw_node_type hw_node_ce0 =
{
  "CE0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_ce0_requests }, /* request list */
  { 0, 1, hw_node_ce0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_node_type hw_node_ip0 =
{
  "IP0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 0, NULL }, /* request list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_mm1_requests[3];
static icb_hw_request_type *hw_node_mm1_queries[3];

static icb_hw_node_type hw_node_mm1 =
{
  "MM1",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 3, hw_node_mm1_requests }, /* request list */
  { 0, 3, hw_node_mm1_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sh2_requests[2];
static icb_hw_request_type *hw_node_sh2_queries[2];

static icb_hw_node_type hw_node_sh2 =
{
  "SH2",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 2, hw_node_sh2_requests }, /* request list */
  { 0, 2, hw_node_sh2_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_mm2_requests[1];
static icb_hw_request_type *hw_node_mm2_queries[1];

static icb_hw_node_type hw_node_mm2 =
{
  "MM2",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_mm2_requests }, /* request list */
  { 0, 1, hw_node_mm2_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_qup0_requests[3];
static icb_hw_request_type *hw_node_qup0_queries[3];

static icb_hw_node_type hw_node_qup0 =
{
  "QUP0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 3, hw_node_qup0_requests }, /* request list */
  { 0, 3, hw_node_qup0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sh3_requests[1];
static icb_hw_request_type *hw_node_sh3_queries[1];

static icb_hw_node_type hw_node_sh3 =
{
  "SH3",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sh3_requests }, /* request list */
  { 0, 1, hw_node_sh3_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_mm3_requests[5];
static icb_hw_request_type *hw_node_mm3_queries[5];

static icb_hw_node_type hw_node_mm3 =
{
  "MM3",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 5, hw_node_mm3_requests }, /* request list */
  { 0, 5, hw_node_mm3_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sh4_requests[1];
static icb_hw_request_type *hw_node_sh4_queries[1];

static icb_hw_node_type hw_node_sh4 =
{
  "SH4",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sh4_requests }, /* request list */
  { 0, 1, hw_node_sh4_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn0_requests[1];
static icb_hw_request_type *hw_node_sn0_queries[1];

static icb_hw_node_type hw_node_sn0 =
{
  "SN0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn0_requests }, /* request list */
  { 0, 1, hw_node_sn0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_co0_requests[1];
static icb_hw_request_type *hw_node_co0_queries[1];

static icb_hw_node_type hw_node_co0 =
{
  "CO0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_co0_requests }, /* request list */
  { 0, 1, hw_node_co0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_cn0_requests[52];
static icb_hw_request_type *hw_node_cn0_queries[52];

static icb_hw_node_type hw_node_cn0 =
{
  "CN0",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 52, hw_node_cn0_requests }, /* request list */
  { 0, 52, hw_node_cn0_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn1_requests[1];
static icb_hw_request_type *hw_node_sn1_queries[1];

static icb_hw_node_type hw_node_sn1 =
{
  "SN1",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn1_requests }, /* request list */
  { 0, 1, hw_node_sn1_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn2_requests[1];
static icb_hw_request_type *hw_node_sn2_queries[1];

static icb_hw_node_type hw_node_sn2 =
{
  "SN2",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn2_requests }, /* request list */
  { 0, 1, hw_node_sn2_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_co2_requests[1];
static icb_hw_request_type *hw_node_co2_queries[1];

static icb_hw_node_type hw_node_co2 =
{
  "CO2",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_co2_requests }, /* request list */
  { 0, 1, hw_node_co2_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn3_requests[1];
static icb_hw_request_type *hw_node_sn3_queries[1];

static icb_hw_node_type hw_node_sn3 =
{
  "SN3",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn3_requests }, /* request list */
  { 0, 1, hw_node_sn3_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn4_requests[1];
static icb_hw_request_type *hw_node_sn4_queries[1];

static icb_hw_node_type hw_node_sn4 =
{
  "SN4",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn4_requests }, /* request list */
  { 0, 1, hw_node_sn4_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn5_requests[1];
static icb_hw_request_type *hw_node_sn5_queries[1];

static icb_hw_node_type hw_node_sn5 =
{
  "SN5",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn5_requests }, /* request list */
  { 0, 1, hw_node_sn5_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn6_requests[2];
static icb_hw_request_type *hw_node_sn6_queries[2];

static icb_hw_node_type hw_node_sn6 =
{
  "SN6",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 2, hw_node_sn6_requests }, /* request list */
  { 0, 2, hw_node_sn6_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn7_requests[1];
static icb_hw_request_type *hw_node_sn7_queries[1];

static icb_hw_node_type hw_node_sn7 =
{
  "SN7",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn7_requests }, /* request list */
  { 0, 1, hw_node_sn7_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn8_requests[1];
static icb_hw_request_type *hw_node_sn8_queries[1];

static icb_hw_node_type hw_node_sn8 =
{
  "SN8",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn8_requests }, /* request list */
  { 0, 1, hw_node_sn8_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn9_requests[1];
static icb_hw_request_type *hw_node_sn9_queries[1];

static icb_hw_node_type hw_node_sn9 =
{
  "SN9",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn9_requests }, /* request list */
  { 0, 1, hw_node_sn9_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn11_requests[1];
static icb_hw_request_type *hw_node_sn11_queries[1];

static icb_hw_node_type hw_node_sn11 =
{
  "SN11",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 1, hw_node_sn11_requests }, /* request list */
  { 0, 1, hw_node_sn11_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

static icb_hw_request_type *hw_node_sn12_requests[2];
static icb_hw_request_type *hw_node_sn12_queries[2];

static icb_hw_node_type hw_node_sn12 =
{
  "SN12",
  ICB_HW_NODE_KIND_BANDWIDTH,
  0, /* hw_id */
  0, /* width */
  0, /* bw_unit */
  0, /* clk_id */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  0, /* output state */
  { NULL, ICB_HW_BANDWIDTH_REQUEST, NULL, false }, /* node request */
  { NULL, NULL, 0, false }, /* active/wake rpm request */
  { NULL, NULL, 0, false }, /* sleep rpm request */
  { 0, 2, hw_node_sn12_requests }, /* request list */
  { 0, 2, hw_node_sn12_queries }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/****************************************************************************/
/*                              MASTERS                                     */
/****************************************************************************/
/**** Master: alm_gpu_tcu ****/
static uint32_t master_alm_gpu_tcu_qos_ports[1] =
{
  127, /* port 0 */
};

static icb_hw_node_type *master_alm_gpu_tcu_bws[] =
{
  &hw_node_sh2,
};

/* master definition */
static icb_master_def_type master_alm_gpu_tcu =
{
  "alm_gpu_tcu",
  ICBID_MASTER_GPU_TCU, /* master id */
  &bus_gem_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_alm_gpu_tcu_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_alm_gpu_tcu_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: alm_sys_tcu ****/
static uint32_t master_alm_sys_tcu_qos_ports[1] =
{
  128, /* port 0 */
};

static icb_hw_node_type *master_alm_sys_tcu_bws[] =
{
  &hw_node_sh2,
};

/* master definition */
static icb_master_def_type master_alm_sys_tcu =
{
  "alm_sys_tcu",
  ICBID_MASTER_SYS_TCU, /* master id */
  &bus_gem_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_alm_sys_tcu_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_alm_sys_tcu_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: amm_npu_sys ****/
/* master definition */
static icb_master_def_type master_amm_npu_sys =
{
  "amm_npu_sys",
  ICBID_MASTER_NPU_SYS, /* master id */
  &bus_npu_noc, /* bus */
  32, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  4, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: amm_npu_sys_cdp_w ****/
/* master definition */
static icb_master_def_type master_amm_npu_sys_cdp_w =
{
  "amm_npu_sys_cdp_w",
  ICBID_MASTER_NPU_CDP, /* master id */
  &bus_npu_noc, /* bus */
  16, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: chm_apps ****/
static icb_hw_node_type *master_chm_apps_bws[] =
{
  &hw_node_sh4,
};

/* master definition */
static icb_master_def_type master_chm_apps =
{
  "chm_apps",
  ICBID_MASTER_APPSS_PROC, /* master id */
  &bus_gem_noc, /* bus */
  32, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_chm_apps_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: llcc_mc ****/
/* master definition */
static icb_master_def_type master_llcc_mc =
{
  "llcc_mc",
  ICBID_MASTER_LLCC, /* master id */
  &bus_mc_virt, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  4, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_a1noc_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_a1noc_cfg =
{
  "qhm_a1noc_cfg",
  ICBID_MASTER_A1NOC_CFG, /* master id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_a2noc_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_a2noc_cfg =
{
  "qhm_a2noc_cfg",
  ICBID_MASTER_A2NOC_CFG, /* master id */
  &bus_aggre2_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_cfg =
{
  "qhm_cfg",
  ICBID_MASTER_NPU_NOC_CFG, /* master id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_cnoc_dc_noc ****/
/* master definition */
static icb_master_def_type master_qhm_cnoc_dc_noc =
{
  "qhm_cnoc_dc_noc",
  ICBID_MASTER_CNOC_DC_NOC, /* master id */
  &bus_dc_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_gemnoc_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_gemnoc_cfg =
{
  "qhm_gemnoc_cfg",
  ICBID_MASTER_GEM_NOC_CFG, /* master id */
  &bus_gem_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_mnoc_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_mnoc_cfg =
{
  "qhm_mnoc_cfg",
  ICBID_MASTER_CNOC_MNOC_CFG, /* master id */
  &bus_mmss_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_qdss_bam ****/
static uint32_t master_qhm_qdss_bam_qos_ports[1] =
{
  11, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qhm_qdss_bam =
{
  "qhm_qdss_bam",
  ICBID_MASTER_QDSS_BAM, /* master id */
  &bus_aggre2_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_qdss_bam_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_qspi ****/
static uint32_t master_qhm_qspi_qos_ports[1] =
{
  7, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qhm_qspi =
{
  "qhm_qspi",
  ICBID_MASTER_QSPI_0, /* master id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_qspi_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_qup0 ****/
static uint32_t master_qhm_qup0_qos_ports[1] =
{
  12, /* port 0 */
};

static icb_hw_node_type *master_qhm_qup0_bws[] =
{
  &hw_node_qup0,
};

/* master definition */
static icb_master_def_type master_qhm_qup0 =
{
  "qhm_qup0",
  ICBID_MASTER_QUP_0, /* master id */
  &bus_aggre2_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_qup0_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qhm_qup0_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_qup1 ****/
static uint32_t master_qhm_qup1_qos_ports[1] =
{
  5, /* port 0 */
};

static icb_hw_node_type *master_qhm_qup1_bws[] =
{
  &hw_node_qup0,
};

/* master definition */
static icb_master_def_type master_qhm_qup1 =
{
  "qhm_qup1",
  ICBID_MASTER_QUP_1, /* master id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_qup1_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qhm_qup1_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_qup2 ****/
static uint32_t master_qhm_qup2_qos_ports[1] =
{
  6, /* port 0 */
};

static icb_hw_node_type *master_qhm_qup2_bws[] =
{
  &hw_node_qup0,
};

/* master definition */
static icb_master_def_type master_qhm_qup2 =
{
  "qhm_qup2",
  ICBID_MASTER_QUP_2, /* master id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_qup2_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qhm_qup2_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_snoc_cfg ****/
/* master definition */
static icb_master_def_type master_qhm_snoc_cfg =
{
  "qhm_snoc_cfg",
  ICBID_MASTER_SNOC_CFG, /* master id */
  &bus_system_noc, /* bus */
  4, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qhm_tsif ****/
static uint32_t master_qhm_tsif_qos_ports[1] =
{
  8, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qhm_tsif =
{
  "qhm_tsif",
  ICBID_MASTER_TSIF, /* master id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  1, /* number of qos ports */
  master_qhm_tsif_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_aggre1_noc ****/
static icb_hw_node_type *master_qnm_aggre1_noc_bws[] =
{
  &hw_node_sn7,
};

/* master definition */
static icb_master_def_type master_qnm_aggre1_noc =
{
  "qnm_aggre1_noc",
  ICBID_MASTER_A1NOC_SNOC, /* master id */
  &bus_system_noc, /* bus */
  16, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_aggre1_noc_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_aggre2_noc ****/
static icb_hw_node_type *master_qnm_aggre2_noc_bws[] =
{
  &hw_node_sn8,
};

/* master definition */
static icb_master_def_type master_qnm_aggre2_noc =
{
  "qnm_aggre2_noc",
  ICBID_MASTER_A2NOC_SNOC, /* master id */
  &bus_system_noc, /* bus */
  16, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_aggre2_noc_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_camnoc_hf ****/
static uint32_t master_qnm_camnoc_hf_qos_ports[2] =
{
  4, /* port 0 */
  5, /* port 1 */
};

static icb_hw_node_type *master_qnm_camnoc_hf_bws[] =
{
  &hw_node_mm1,
};

/* master definition */
static icb_master_def_type master_qnm_camnoc_hf =
{
  "qnm_camnoc_hf",
  ICBID_MASTER_CAMNOC_HF, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_camnoc_hf_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_camnoc_hf_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_camnoc_icp ****/
static uint32_t master_qnm_camnoc_icp_qos_ports[1] =
{
  2, /* port 0 */
};

static icb_hw_node_type *master_qnm_camnoc_icp_bws[] =
{
  &hw_node_mm3,
};

/* master definition */
static icb_master_def_type master_qnm_camnoc_icp =
{
  "qnm_camnoc_icp",
  ICBID_MASTER_CAMNOC_ICP, /* master id */
  &bus_mmss_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_camnoc_icp_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_camnoc_icp_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_camnoc_sf ****/
static uint32_t master_qnm_camnoc_sf_qos_ports[2] =
{
  0, /* port 0 */
  1, /* port 1 */
};

static icb_hw_node_type *master_qnm_camnoc_sf_bws[] =
{
  &hw_node_mm3,
};

/* master definition */
static icb_master_def_type master_qnm_camnoc_sf =
{
  "qnm_camnoc_sf",
  ICBID_MASTER_CAMNOC_SF, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_camnoc_sf_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_camnoc_sf_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_cmpnoc ****/
static uint32_t master_qnm_cmpnoc_qos_ports[2] =
{
  0, /* port 0 */
  64, /* port 1 */
};

static icb_hw_node_type *master_qnm_cmpnoc_bws[] =
{
  &hw_node_sh3,
};

/* master definition */
static icb_master_def_type master_qnm_cmpnoc =
{
  "qnm_cmpnoc",
  ICBID_MASTER_COMPUTE_NOC, /* master id */
  &bus_gem_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_cmpnoc_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_cmpnoc_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_cnoc ****/
static uint32_t master_qnm_cnoc_qos_ports[1] =
{
  0, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qnm_cnoc =
{
  "qnm_cnoc",
  ICBID_MASTER_CNOC_A2NOC, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_cnoc_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_gemnoc ****/
static icb_hw_node_type *master_qnm_gemnoc_bws[] =
{
  &hw_node_sn11,
};

/* master definition */
static icb_master_def_type master_qnm_gemnoc =
{
  "qnm_gemnoc",
  ICBID_MASTER_GEM_NOC_SNOC, /* master id */
  &bus_system_noc, /* bus */
  16, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_gemnoc_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_gemnoc_pcie ****/
static icb_hw_node_type *master_qnm_gemnoc_pcie_bws[] =
{
  &hw_node_sn9,
};

/* master definition */
static icb_master_def_type master_qnm_gemnoc_pcie =
{
  "qnm_gemnoc_pcie",
  ICBID_MASTER_GEM_NOC_PCIE_SNOC, /* master id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_gemnoc_pcie_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_gpu ****/
static uint32_t master_qnm_gpu_qos_ports[2] =
{
  1, /* port 0 */
  65, /* port 1 */
};

/* master definition */
static icb_master_def_type master_qnm_gpu =
{
  "qnm_gpu",
  ICBID_MASTER_GFX3D, /* master id */
  &bus_gem_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_gpu_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_mnoc_hf ****/
static uint32_t master_qnm_mnoc_hf_qos_ports[2] =
{
  2, /* port 0 */
  66, /* port 1 */
};

/* master definition */
static icb_master_def_type master_qnm_mnoc_hf =
{
  "qnm_mnoc_hf",
  ICBID_MASTER_MNOC_HF_MEM_NOC, /* master id */
  &bus_gem_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_mnoc_hf_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_mnoc_sf ****/
static uint32_t master_qnm_mnoc_sf_qos_ports[2] =
{
  3, /* port 0 */
  67, /* port 1 */
};

/* master definition */
static icb_master_def_type master_qnm_mnoc_sf =
{
  "qnm_mnoc_sf",
  ICBID_MASTER_MNOC_SF_MEM_NOC, /* master id */
  &bus_gem_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_mnoc_sf_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_npu ****/
static uint32_t master_qnm_npu_qos_ports[2] =
{
  6, /* port 0 */
  7, /* port 1 */
};

static icb_hw_node_type *master_qnm_npu_bws[] =
{
  &hw_node_co2,
};

/* master definition */
static icb_master_def_type master_qnm_npu =
{
  "qnm_npu",
  ICBID_MASTER_NPU, /* master id */
  &bus_compute_noc, /* bus */
  32, /* width in bytes */
  2, /* number of qos ports */
  master_qnm_npu_qos_ports, /* qos ports */
  2, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_npu_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_pcie ****/
static uint32_t master_qnm_pcie_qos_ports[1] =
{
  129, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qnm_pcie =
{
  "qnm_pcie",
  ICBID_MASTER_GEM_NOC_PCIE_SNOC, /* master id */
  &bus_gem_noc, /* bus */
  16, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_pcie_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_snoc ****/
static icb_hw_node_type *master_qnm_snoc_bws[] =
{
  &hw_node_cn0,
};

/* master definition */
static icb_master_def_type master_qnm_snoc =
{
  "qnm_snoc",
  ICBID_MASTER_SNOC_CNOC, /* master id */
  &bus_config_noc, /* bus */
  8, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_snoc_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_snoc_gc ****/
static uint32_t master_qnm_snoc_gc_qos_ports[1] =
{
  130, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qnm_snoc_gc =
{
  "qnm_snoc_gc",
  ICBID_MASTER_SNOC_GC_MEM_NOC, /* master id */
  &bus_gem_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_snoc_gc_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_snoc_sf ****/
static uint32_t master_qnm_snoc_sf_qos_ports[1] =
{
  131, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qnm_snoc_sf =
{
  "qnm_snoc_sf",
  ICBID_MASTER_SNOC_SF_MEM_NOC, /* master id */
  &bus_gem_noc, /* bus */
  16, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_snoc_sf_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_video0 ****/
static uint32_t master_qnm_video0_qos_ports[1] =
{
  12, /* port 0 */
};

static icb_hw_node_type *master_qnm_video0_bws[] =
{
  &hw_node_mm3,
};

/* master definition */
static icb_master_def_type master_qnm_video0 =
{
  "qnm_video0",
  ICBID_MASTER_VIDEO_P0, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_video0_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_video0_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_video1 ****/
static uint32_t master_qnm_video1_qos_ports[1] =
{
  13, /* port 0 */
};

static icb_hw_node_type *master_qnm_video1_bws[] =
{
  &hw_node_mm3,
};

/* master definition */
static icb_master_def_type master_qnm_video1 =
{
  "qnm_video1",
  ICBID_MASTER_VIDEO_P1, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_video1_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_video1_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qnm_video_cvp ****/
static uint32_t master_qnm_video_cvp_qos_ports[1] =
{
  14, /* port 0 */
};

static icb_hw_node_type *master_qnm_video_cvp_bws[] =
{
  &hw_node_mm3,
};

/* master definition */
static icb_master_def_type master_qnm_video_cvp =
{
  "qnm_video_cvp",
  ICBID_MASTER_VIDEO_PROC, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qnm_video_cvp_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qnm_video_cvp_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_camnoc_hf0_uncomp ****/
/* master definition */
static icb_master_def_type master_qxm_camnoc_hf0_uncomp =
{
  "qxm_camnoc_hf0_uncomp",
  ICBID_MASTER_CAMNOC_HF0_UNCOMP, /* master id */
  &bus_camnoc_virt, /* bus */
  32, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_camnoc_hf1_uncomp ****/
/* master definition */
static icb_master_def_type master_qxm_camnoc_hf1_uncomp =
{
  "qxm_camnoc_hf1_uncomp",
  ICBID_MASTER_CAMNOC_HF1_UNCOMP, /* master id */
  &bus_camnoc_virt, /* bus */
  32, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_camnoc_sf_uncomp ****/
/* master definition */
static icb_master_def_type master_qxm_camnoc_sf_uncomp =
{
  "qxm_camnoc_sf_uncomp",
  ICBID_MASTER_CAMNOC_SF_UNCOMP, /* master id */
  &bus_camnoc_virt, /* bus */
  32, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_crypto ****/
static uint32_t master_qxm_crypto_qos_ports[1] =
{
  1, /* port 0 */
};

static icb_hw_node_type *master_qxm_crypto_bws[] =
{
  &hw_node_ce0,
};

/* master definition */
static icb_master_def_type master_qxm_crypto =
{
  "qxm_crypto",
  ICBID_MASTER_CRYPTO, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_crypto_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qxm_crypto_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_ipa ****/
static uint32_t master_qxm_ipa_qos_ports[1] =
{
  2, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qxm_ipa =
{
  "qxm_ipa",
  ICBID_MASTER_IPA, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_ipa_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_mdp0 ****/
static uint32_t master_qxm_mdp0_qos_ports[1] =
{
  6, /* port 0 */
};

static icb_hw_node_type *master_qxm_mdp0_bws[] =
{
  &hw_node_mm1,
};

/* master definition */
static icb_master_def_type master_qxm_mdp0 =
{
  "qxm_mdp0",
  ICBID_MASTER_MDP0, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_mdp0_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qxm_mdp0_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_mdp1 ****/
static uint32_t master_qxm_mdp1_qos_ports[1] =
{
  8, /* port 0 */
};

static icb_hw_node_type *master_qxm_mdp1_bws[] =
{
  &hw_node_mm1,
};

/* master definition */
static icb_master_def_type master_qxm_mdp1 =
{
  "qxm_mdp1",
  ICBID_MASTER_MDP1, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_mdp1_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_qxm_mdp1_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_pimem ****/
static uint32_t master_qxm_pimem_qos_ports[1] =
{
  0, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qxm_pimem =
{
  "qxm_pimem",
  ICBID_MASTER_PIMEM, /* master id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_pimem_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: qxm_rot ****/
static uint32_t master_qxm_rot_qos_ports[1] =
{
  10, /* port 0 */
};

/* master definition */
static icb_master_def_type master_qxm_rot =
{
  "qxm_rot",
  ICBID_MASTER_ROTATOR, /* master id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  1, /* number of qos ports */
  master_qxm_rot_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_gic ****/
static uint32_t master_xm_gic_qos_ports[1] =
{
  1, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_gic =
{
  "xm_gic",
  ICBID_MASTER_GIC, /* master id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_gic_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_pcie3_0 ****/
static uint32_t master_xm_pcie3_0_qos_ports[1] =
{
  8, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_pcie3_0 =
{
  "xm_pcie3_0",
  ICBID_MASTER_PCIE_0, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_pcie3_0_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_pcie3_1 ****/
static uint32_t master_xm_pcie3_1_qos_ports[1] =
{
  9, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_pcie3_1 =
{
  "xm_pcie3_1",
  ICBID_MASTER_PCIE_1, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_pcie3_1_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_pcie3_modem ****/
static uint32_t master_xm_pcie3_modem_qos_ports[1] =
{
  4, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_pcie3_modem =
{
  "xm_pcie3_modem",
  ICBID_MASTER_PCIE_2, /* master id */
  &bus_aggre1_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_pcie3_modem_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_qdss_dap ****/
static icb_hw_node_type *master_xm_qdss_dap_bws[] =
{
  &hw_node_cn0,
};

/* master definition */
static icb_master_def_type master_xm_qdss_dap =
{
  "xm_qdss_dap",
  ICBID_MASTER_QDSS_DAP, /* master id */
  &bus_config_noc, /* bus */
  8, /* width in bytes */
  0, /* number of qos ports */
  NULL, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  master_xm_qdss_dap_bws, /* bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_qdss_etr ****/
static uint32_t master_xm_qdss_etr_qos_ports[1] =
{
  7, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_qdss_etr =
{
  "xm_qdss_etr",
  ICBID_MASTER_QDSS_ETR, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_qdss_etr_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_sdc2 ****/
static uint32_t master_xm_sdc2_qos_ports[1] =
{
  3, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_sdc2 =
{
  "xm_sdc2",
  ICBID_MASTER_SDCC_2, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_sdc2_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_sdc4 ****/
static uint32_t master_xm_sdc4_qos_ports[1] =
{
  2, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_sdc4 =
{
  "xm_sdc4",
  ICBID_MASTER_SDCC_4, /* master id */
  &bus_aggre1_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_sdc4_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_ufs_card ****/
static uint32_t master_xm_ufs_card_qos_ports[1] =
{
  4, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_ufs_card =
{
  "xm_ufs_card",
  ICBID_MASTER_UFS_CARD, /* master id */
  &bus_aggre2_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_ufs_card_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_ufs_mem ****/
static uint32_t master_xm_ufs_mem_qos_ports[1] =
{
  3, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_ufs_mem =
{
  "xm_ufs_mem",
  ICBID_MASTER_UFS_MEM, /* master id */
  &bus_aggre1_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_ufs_mem_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_usb3_0 ****/
static uint32_t master_xm_usb3_0_qos_ports[1] =
{
  0, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_usb3_0 =
{
  "xm_usb3_0",
  ICBID_MASTER_USB3_0, /* master id */
  &bus_aggre1_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_usb3_0_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/**** Master: xm_usb3_1 ****/
static uint32_t master_xm_usb3_1_qos_ports[1] =
{
  1, /* port 0 */
};

/* master definition */
static icb_master_def_type master_xm_usb3_1 =
{
  "xm_usb3_1",
  ICBID_MASTER_USB3_1, /* master id */
  &bus_aggre1_noc, /* bus */
  8, /* width in bytes */
  1, /* number of qos ports */
  master_xm_usb3_1_qos_ports, /* qos ports */
  1, /* Number of ports for aggregation purposes */
  false, /* Locally managed QoS? */
  NULL, /* qos policy */
  NULL, /* qos policy override */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_MASTER_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { NULL, ICB_MASTER_LATENCY_REQUEST, NULL, false }, /* Latency request structure */
  { ICB_MASTER_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  0,
  NULL, /* no latency nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
};

/****************************************************************************/
/*                              SLAVES                                      */
/****************************************************************************/
/**** Slave: ebi ****/
static icb_hw_node_type *slave_ebi_bws[] =
{
  &hw_node_mc0,
  &hw_node_acv,
};

static icb_slave_def_type slave_ebi =
{
  "ebi",
  ICBID_SLAVE_EBI1, /* id */
  &bus_mc_virt, /* bus */
  4, /* width in bytes */
  4, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  2,
  slave_ebi_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_a1_noc_cfg ****/
static icb_hw_node_type *slave_qhs_a1_noc_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_a1_noc_cfg =
{
  "qhs_a1_noc_cfg",
  ICBID_SLAVE_A1NOC_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_a1_noc_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_a2_noc_cfg ****/
static icb_hw_node_type *slave_qhs_a2_noc_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_a2_noc_cfg =
{
  "qhs_a2_noc_cfg",
  ICBID_SLAVE_A2NOC_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_a2_noc_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ahb2phy0 ****/
static icb_hw_node_type *slave_qhs_ahb2phy0_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ahb2phy0 =
{
  "qhs_ahb2phy0",
  ICBID_SLAVE_AHB2PHY_SOUTH, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ahb2phy0_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ahb2phy1 ****/
static icb_hw_node_type *slave_qhs_ahb2phy1_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ahb2phy1 =
{
  "qhs_ahb2phy1",
  ICBID_SLAVE_AHB2PHY_NORTH, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ahb2phy1_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_aoss ****/
static icb_hw_node_type *slave_qhs_aoss_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_aoss =
{
  "qhs_aoss",
  ICBID_SLAVE_AOSS, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_aoss_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_apss ****/
static icb_slave_def_type slave_qhs_apss =
{
  "qhs_apss",
  ICBID_SLAVE_APPSS, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cal_dp0 ****/
static icb_slave_def_type slave_qhs_cal_dp0 =
{
  "qhs_cal_dp0",
  ICBID_SLAVE_NPU_CAL_DP0, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cal_dp1 ****/
static icb_slave_def_type slave_qhs_cal_dp1 =
{
  "qhs_cal_dp1",
  ICBID_SLAVE_NPU_CAL_DP1, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_camera_cfg ****/
static icb_hw_node_type *slave_qhs_camera_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_camera_cfg =
{
  "qhs_camera_cfg",
  ICBID_SLAVE_CAMERA_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_camera_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_clk_ctl ****/
static icb_hw_node_type *slave_qhs_clk_ctl_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_clk_ctl =
{
  "qhs_clk_ctl",
  ICBID_SLAVE_CLK_CTL, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_clk_ctl_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_compute_dsp ****/
static icb_hw_node_type *slave_qhs_compute_dsp_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_compute_dsp =
{
  "qhs_compute_dsp",
  ICBID_SLAVE_CDSP_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_compute_dsp_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cp ****/
static icb_slave_def_type slave_qhs_cp =
{
  "qhs_cp",
  ICBID_SLAVE_NPU_CP, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cpr_cx ****/
static icb_hw_node_type *slave_qhs_cpr_cx_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_cpr_cx =
{
  "qhs_cpr_cx",
  ICBID_SLAVE_RBCPR_CX_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_cpr_cx_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cpr_mmcx ****/
static icb_hw_node_type *slave_qhs_cpr_mmcx_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_cpr_mmcx =
{
  "qhs_cpr_mmcx",
  ICBID_SLAVE_RBCPR_MMCX_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_cpr_mmcx_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cpr_mx ****/
static icb_hw_node_type *slave_qhs_cpr_mx_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_cpr_mx =
{
  "qhs_cpr_mx",
  ICBID_SLAVE_RBCPR_MX_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_cpr_mx_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_crypto0_cfg ****/
static icb_hw_node_type *slave_qhs_crypto0_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_crypto0_cfg =
{
  "qhs_crypto0_cfg",
  ICBID_SLAVE_CRYPTO_0_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_crypto0_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_cx_rdpm ****/
static icb_hw_node_type *slave_qhs_cx_rdpm_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_cx_rdpm =
{
  "qhs_cx_rdpm",
  ICBID_SLAVE_CX_RDPM, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_cx_rdpm_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_dcc_cfg ****/
static icb_hw_node_type *slave_qhs_dcc_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_dcc_cfg =
{
  "qhs_dcc_cfg",
  ICBID_SLAVE_DCC_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_dcc_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ddrss_cfg ****/
static icb_hw_node_type *slave_qhs_ddrss_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ddrss_cfg =
{
  "qhs_ddrss_cfg",
  ICBID_SLAVE_CNOC_DDRSS, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ddrss_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_display_cfg ****/
static icb_hw_node_type *slave_qhs_display_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_display_cfg =
{
  "qhs_display_cfg",
  ICBID_SLAVE_DISPLAY_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_display_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_dma_bwmon ****/
static icb_slave_def_type slave_qhs_dma_bwmon =
{
  "qhs_dma_bwmon",
  ICBID_SLAVE_NPU_INT_DMA_BWMON_CFG, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_dpm ****/
static icb_slave_def_type slave_qhs_dpm =
{
  "qhs_dpm",
  ICBID_SLAVE_NPU_DPM, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_gpuss_cfg ****/
static icb_hw_node_type *slave_qhs_gpuss_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_gpuss_cfg =
{
  "qhs_gpuss_cfg",
  ICBID_SLAVE_GFX3D_CFG, /* id */
  &bus_config_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_gpuss_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_imem_cfg ****/
static icb_hw_node_type *slave_qhs_imem_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_imem_cfg =
{
  "qhs_imem_cfg",
  ICBID_SLAVE_IMEM_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_imem_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ipa ****/
static icb_hw_node_type *slave_qhs_ipa_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ipa =
{
  "qhs_ipa",
  ICBID_SLAVE_IPA_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ipa_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ipc_router ****/
static icb_hw_node_type *slave_qhs_ipc_router_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ipc_router =
{
  "qhs_ipc_router",
  ICBID_SLAVE_IPC_ROUTER_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ipc_router_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_isense ****/
static icb_slave_def_type slave_qhs_isense =
{
  "qhs_isense",
  ICBID_SLAVE_ISENSE_CFG, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_llcc ****/
static icb_slave_def_type slave_qhs_llcc =
{
  "qhs_llcc",
  ICBID_SLAVE_LLCC_CFG, /* id */
  &bus_dc_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_llm ****/
static icb_slave_def_type slave_qhs_llm =
{
  "qhs_llm",
  ICBID_SLAVE_NPU_LLM_CFG, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_lpass_cfg ****/
static icb_hw_node_type *slave_qhs_lpass_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_lpass_cfg =
{
  "qhs_lpass_cfg",
  ICBID_SLAVE_LPASS, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_lpass_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_memnoc ****/
static icb_slave_def_type slave_qhs_memnoc =
{
  "qhs_memnoc",
  ICBID_SLAVE_GEM_NOC_CFG, /* id */
  &bus_dc_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_mnoc_cfg ****/
static icb_hw_node_type *slave_qhs_mnoc_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_mnoc_cfg =
{
  "qhs_mnoc_cfg",
  ICBID_SLAVE_CNOC_MNOC_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_mnoc_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_npu_cfg ****/
static icb_hw_node_type *slave_qhs_npu_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_npu_cfg =
{
  "qhs_npu_cfg",
  ICBID_SLAVE_NPU_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_npu_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_pcie0_cfg ****/
static icb_hw_node_type *slave_qhs_pcie0_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_pcie0_cfg =
{
  "qhs_pcie0_cfg",
  ICBID_SLAVE_PCIE_0_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_pcie0_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_pcie1_cfg ****/
static icb_hw_node_type *slave_qhs_pcie1_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_pcie1_cfg =
{
  "qhs_pcie1_cfg",
  ICBID_SLAVE_PCIE_1_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_pcie1_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_pcie_modem_cfg ****/
static icb_hw_node_type *slave_qhs_pcie_modem_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_pcie_modem_cfg =
{
  "qhs_pcie_modem_cfg",
  ICBID_SLAVE_PCIE_2_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_pcie_modem_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_pdm ****/
static icb_hw_node_type *slave_qhs_pdm_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_pdm =
{
  "qhs_pdm",
  ICBID_SLAVE_PDM, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_pdm_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_pimem_cfg ****/
static icb_hw_node_type *slave_qhs_pimem_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_pimem_cfg =
{
  "qhs_pimem_cfg",
  ICBID_SLAVE_PIMEM_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_pimem_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_prng ****/
static icb_hw_node_type *slave_qhs_prng_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_prng =
{
  "qhs_prng",
  ICBID_SLAVE_PRNG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_prng_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_qdss_cfg ****/
static icb_hw_node_type *slave_qhs_qdss_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_qdss_cfg =
{
  "qhs_qdss_cfg",
  ICBID_SLAVE_QDSS_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_qdss_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_qspi ****/
static icb_hw_node_type *slave_qhs_qspi_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_qspi =
{
  "qhs_qspi",
  ICBID_SLAVE_QSPI_0, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_qspi_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_qup0 ****/
static icb_hw_node_type *slave_qhs_qup0_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_qup0 =
{
  "qhs_qup0",
  ICBID_SLAVE_QUP_0, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_qup0_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_qup1 ****/
static icb_hw_node_type *slave_qhs_qup1_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_qup1 =
{
  "qhs_qup1",
  ICBID_SLAVE_QUP_1, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_qup1_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_qup2 ****/
static icb_hw_node_type *slave_qhs_qup2_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_qup2 =
{
  "qhs_qup2",
  ICBID_SLAVE_QUP_2, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_qup2_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_sdc2 ****/
static icb_hw_node_type *slave_qhs_sdc2_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_sdc2 =
{
  "qhs_sdc2",
  ICBID_SLAVE_SDCC_2, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_sdc2_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_sdc4 ****/
static icb_hw_node_type *slave_qhs_sdc4_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_sdc4 =
{
  "qhs_sdc4",
  ICBID_SLAVE_SDCC_4, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_sdc4_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_snoc_cfg ****/
static icb_hw_node_type *slave_qhs_snoc_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_snoc_cfg =
{
  "qhs_snoc_cfg",
  ICBID_SLAVE_SNOC_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_snoc_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tcm ****/
static icb_slave_def_type slave_qhs_tcm =
{
  "qhs_tcm",
  ICBID_SLAVE_NPU_TCM, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tcsr ****/
static icb_hw_node_type *slave_qhs_tcsr_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_tcsr =
{
  "qhs_tcsr",
  ICBID_SLAVE_TCSR, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_tcsr_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tlmm0 ****/
static icb_hw_node_type *slave_qhs_tlmm0_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_tlmm0 =
{
  "qhs_tlmm0",
  ICBID_SLAVE_TLMM_NORTH, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_tlmm0_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tlmm1 ****/
static icb_hw_node_type *slave_qhs_tlmm1_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_tlmm1 =
{
  "qhs_tlmm1",
  ICBID_SLAVE_TLMM_SOUTH, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_tlmm1_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tlmm2 ****/
static icb_hw_node_type *slave_qhs_tlmm2_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_tlmm2 =
{
  "qhs_tlmm2",
  ICBID_SLAVE_TLMM_WEST, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_tlmm2_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_tsif ****/
static icb_hw_node_type *slave_qhs_tsif_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_tsif =
{
  "qhs_tsif",
  ICBID_SLAVE_TSIF, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_tsif_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ufs_card_cfg ****/
static icb_hw_node_type *slave_qhs_ufs_card_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ufs_card_cfg =
{
  "qhs_ufs_card_cfg",
  ICBID_SLAVE_UFS_CARD_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ufs_card_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_ufs_mem_cfg ****/
static icb_hw_node_type *slave_qhs_ufs_mem_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_ufs_mem_cfg =
{
  "qhs_ufs_mem_cfg",
  ICBID_SLAVE_UFS_MEM_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_ufs_mem_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_usb3_0 ****/
static icb_hw_node_type *slave_qhs_usb3_0_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_usb3_0 =
{
  "qhs_usb3_0",
  ICBID_SLAVE_USB3_0, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_usb3_0_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_usb3_1 ****/
static icb_hw_node_type *slave_qhs_usb3_1_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_usb3_1 =
{
  "qhs_usb3_1",
  ICBID_SLAVE_USB3_1, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_usb3_1_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_venus_cfg ****/
static icb_hw_node_type *slave_qhs_venus_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_venus_cfg =
{
  "qhs_venus_cfg",
  ICBID_SLAVE_VENUS_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_venus_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qhs_vsense_ctrl_cfg ****/
static icb_hw_node_type *slave_qhs_vsense_ctrl_cfg_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qhs_vsense_ctrl_cfg =
{
  "qhs_vsense_ctrl_cfg",
  ICBID_SLAVE_VSENSE_CTRL_CFG, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qhs_vsense_ctrl_cfg_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_a1noc_snoc ****/
static icb_slave_def_type slave_qns_a1noc_snoc =
{
  "qns_a1noc_snoc",
  ICBID_SLAVE_A1NOC_SNOC, /* id */
  &bus_aggre1_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_a2noc_snoc ****/
static icb_slave_def_type slave_qns_a2noc_snoc =
{
  "qns_a2noc_snoc",
  ICBID_SLAVE_A2NOC_SNOC, /* id */
  &bus_aggre2_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_camnoc_uncomp ****/
static icb_slave_def_type slave_qns_camnoc_uncomp =
{
  "qns_camnoc_uncomp",
  ICBID_SLAVE_CAMNOC_UNCOMP, /* id */
  &bus_camnoc_virt, /* bus */
  32, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_cdsp_mem_noc ****/
static icb_hw_node_type *slave_qns_cdsp_mem_noc_bws[] =
{
  &hw_node_co0,
};

static icb_slave_def_type slave_qns_cdsp_mem_noc =
{
  "qns_cdsp_mem_noc",
  ICBID_SLAVE_CDSP_MEM_NOC, /* id */
  &bus_compute_noc, /* bus */
  32, /* width in bytes */
  2, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_cdsp_mem_noc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_cnoc ****/
static icb_slave_def_type slave_qns_cnoc =
{
  "qns_cnoc",
  ICBID_SLAVE_SNOC_CNOC, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_cnoc_a2noc ****/
static icb_hw_node_type *slave_qns_cnoc_a2noc_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_qns_cnoc_a2noc =
{
  "qns_cnoc_a2noc",
  ICBID_SLAVE_CNOC_A2NOC, /* id */
  &bus_config_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_cnoc_a2noc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_gem_noc_snoc ****/
static icb_slave_def_type slave_qns_gem_noc_snoc =
{
  "qns_gem_noc_snoc",
  ICBID_SLAVE_GEM_NOC_SNOC, /* id */
  &bus_gem_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_gemnoc_gc ****/
static icb_hw_node_type *slave_qns_gemnoc_gc_bws[] =
{
  &hw_node_sn2,
};

static icb_slave_def_type slave_qns_gemnoc_gc =
{
  "qns_gemnoc_gc",
  ICBID_SLAVE_SNOC_GEM_NOC_GC, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_gemnoc_gc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_gemnoc_sf ****/
static icb_hw_node_type *slave_qns_gemnoc_sf_bws[] =
{
  &hw_node_sn0,
};

static icb_slave_def_type slave_qns_gemnoc_sf =
{
  "qns_gemnoc_sf",
  ICBID_SLAVE_SNOC_GEM_NOC_SF, /* id */
  &bus_system_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_gemnoc_sf_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_llcc ****/
static icb_hw_node_type *slave_qns_llcc_bws[] =
{
  &hw_node_sh0,
};

static icb_slave_def_type slave_qns_llcc =
{
  "qns_llcc",
  ICBID_SLAVE_LLCC, /* id */
  &bus_gem_noc, /* bus */
  16, /* width in bytes */
  4, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_llcc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_mem_noc_hf ****/
static icb_hw_node_type *slave_qns_mem_noc_hf_bws[] =
{
  &hw_node_mm0,
};

static icb_slave_def_type slave_qns_mem_noc_hf =
{
  "qns_mem_noc_hf",
  ICBID_SLAVE_MNOC_HF_MEM_NOC, /* id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  2, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_mem_noc_hf_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_mem_noc_sf ****/
static icb_hw_node_type *slave_qns_mem_noc_sf_bws[] =
{
  &hw_node_mm2,
};

static icb_slave_def_type slave_qns_mem_noc_sf =
{
  "qns_mem_noc_sf",
  ICBID_SLAVE_MNOC_SF_MEM_NOC, /* id */
  &bus_mmss_noc, /* bus */
  32, /* width in bytes */
  2, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_mem_noc_sf_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_npu_sys ****/
static icb_slave_def_type slave_qns_npu_sys =
{
  "qns_npu_sys",
  ICBID_SLAVE_NPU_COMPUTE_NOC, /* id */
  &bus_npu_noc, /* bus */
  32, /* width in bytes */
  2, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_pcie_mem_noc ****/
static icb_hw_node_type *slave_qns_pcie_mem_noc_bws[] =
{
  &hw_node_sn12,
};

static icb_slave_def_type slave_qns_pcie_mem_noc =
{
  "qns_pcie_mem_noc",
  ICBID_SLAVE_ANOC_PCIE_GEM_NOC, /* id */
  &bus_aggre2_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_pcie_mem_noc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_pcie_modem_mem_noc ****/
static icb_hw_node_type *slave_qns_pcie_modem_mem_noc_bws[] =
{
  &hw_node_sn12,
};

static icb_slave_def_type slave_qns_pcie_modem_mem_noc =
{
  "qns_pcie_modem_mem_noc",
  ICBID_SLAVE_ANOC_PCIE_GEM_NOC_1, /* id */
  &bus_aggre1_noc, /* bus */
  16, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qns_pcie_modem_mem_noc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qns_sys_pcie ****/
static icb_slave_def_type slave_qns_sys_pcie =
{
  "qns_sys_pcie",
  ICBID_SLAVE_MEM_NOC_PCIE_SNOC, /* id */
  &bus_gem_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qxs_imem ****/
static icb_hw_node_type *slave_qxs_imem_bws[] =
{
  &hw_node_sn1,
};

static icb_slave_def_type slave_qxs_imem =
{
  "qxs_imem",
  ICBID_SLAVE_IMEM, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qxs_imem_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: qxs_pimem ****/
static icb_hw_node_type *slave_qxs_pimem_bws[] =
{
  &hw_node_sn3,
};

static icb_slave_def_type slave_qxs_pimem =
{
  "qxs_pimem",
  ICBID_SLAVE_PIMEM, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_qxs_pimem_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_aggre1_noc ****/
static icb_slave_def_type slave_srvc_aggre1_noc =
{
  "srvc_aggre1_noc",
  ICBID_SLAVE_SERVICE_A1NOC, /* id */
  &bus_aggre1_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_aggre2_noc ****/
static icb_slave_def_type slave_srvc_aggre2_noc =
{
  "srvc_aggre2_noc",
  ICBID_SLAVE_SERVICE_A2NOC, /* id */
  &bus_aggre2_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_cnoc ****/
static icb_hw_node_type *slave_srvc_cnoc_bws[] =
{
  &hw_node_cn0,
};

static icb_slave_def_type slave_srvc_cnoc =
{
  "srvc_cnoc",
  ICBID_SLAVE_SERVICE_CNOC, /* id */
  &bus_config_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_srvc_cnoc_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_even_gemnoc ****/
static icb_slave_def_type slave_srvc_even_gemnoc =
{
  "srvc_even_gemnoc",
  ICBID_SLAVE_SERVICE_GEM_NOC_1, /* id */
  &bus_gem_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_mnoc ****/
static icb_slave_def_type slave_srvc_mnoc =
{
  "srvc_mnoc",
  ICBID_SLAVE_SERVICE_MNOC, /* id */
  &bus_mmss_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_noc ****/
static icb_slave_def_type slave_srvc_noc =
{
  "srvc_noc",
  ICBID_SLAVE_SERVICE_NPU_NOC, /* id */
  &bus_npu_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_odd_gemnoc ****/
static icb_slave_def_type slave_srvc_odd_gemnoc =
{
  "srvc_odd_gemnoc",
  ICBID_SLAVE_SERVICE_GEM_NOC_2, /* id */
  &bus_gem_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_snoc ****/
static icb_slave_def_type slave_srvc_snoc =
{
  "srvc_snoc",
  ICBID_SLAVE_SERVICE_SNOC, /* id */
  &bus_system_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: srvc_sys_gemnoc ****/
static icb_slave_def_type slave_srvc_sys_gemnoc =
{
  "srvc_sys_gemnoc",
  ICBID_SLAVE_SERVICE_GEM_NOC, /* id */
  &bus_gem_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: xs_pcie_0 ****/
static icb_hw_node_type *slave_xs_pcie_0_bws[] =
{
  &hw_node_sn6,
};

static icb_slave_def_type slave_xs_pcie_0 =
{
  "xs_pcie_0",
  ICBID_SLAVE_PCIE_0, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_xs_pcie_0_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: xs_pcie_1 ****/
static icb_hw_node_type *slave_xs_pcie_1_bws[] =
{
  &hw_node_sn6,
};

static icb_slave_def_type slave_xs_pcie_1 =
{
  "xs_pcie_1",
  ICBID_SLAVE_PCIE_1, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_xs_pcie_1_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: xs_pcie_modem ****/
static icb_hw_node_type *slave_xs_pcie_modem_bws[] =
{
  &hw_node_sn5,
};

static icb_slave_def_type slave_xs_pcie_modem =
{
  "xs_pcie_modem",
  ICBID_SLAVE_PCIE_2, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_xs_pcie_modem_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: xs_qdss_stm ****/
static icb_hw_node_type *slave_xs_qdss_stm_bws[] =
{
  &hw_node_sn4,
};

static icb_slave_def_type slave_xs_qdss_stm =
{
  "xs_qdss_stm",
  ICBID_SLAVE_QDSS_STM, /* id */
  &bus_system_noc, /* bus */
  4, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  1,
  slave_xs_qdss_stm_bws, /* bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/**** Slave: xs_sys_tcu_cfg ****/
static icb_slave_def_type slave_xs_sys_tcu_cfg =
{
  "xs_sys_tcu_cfg",
  ICBID_SLAVE_TCU, /* id */
  &bus_system_noc, /* bus */
  8, /* width in bytes */
  1, /* number of aggregation ports */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* node state */
  { NULL, ICB_SLAVE_BW_REQUEST, NULL, false }, /* Bandwidth request structure */
  { ICB_SLAVE_HW_REQUEST, NULL }, /* Hardware request structure */
  { 0, 0, NULL }, /* request list */
  0,
  NULL, /* no bw nodes */
  { NULL, 0 }, /* notification list */
  { 0, 0, NULL }, /* query list */
  { 0ULL, 0ULL, 0ULL, 0ULL, 0ULL, 0, 0 }, /* query state */
  false, /* is disabled? */
  0, /* number of disable ports */
  NULL, /* No disable ports */
};

/*============================================================================
                        TOPOLOGY ROUTE DECLARATIONS
============================================================================*/
/* Define the valid routes  */
static icb_pair_type route_alm_gpu_tcu_ebi_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_alm_gpu_tcu_ebi_list =
{
  2,
  route_alm_gpu_tcu_ebi_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ahb2phy0_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ahb2phy0_list =
{
  3,
  route_alm_gpu_tcu_qhs_ahb2phy0_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ahb2phy1_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ahb2phy1_list =
{
  3,
  route_alm_gpu_tcu_qhs_ahb2phy1_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_aoss_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_aoss_list =
{
  3,
  route_alm_gpu_tcu_qhs_aoss_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_apss_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_apss_list =
{
  2,
  route_alm_gpu_tcu_qhs_apss_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cal_dp0_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cal_dp0_list =
{
  4,
  route_alm_gpu_tcu_qhs_cal_dp0_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cal_dp1_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cal_dp1_list =
{
  4,
  route_alm_gpu_tcu_qhs_cal_dp1_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_camera_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_camera_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_camera_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_clk_ctl_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_clk_ctl_list =
{
  3,
  route_alm_gpu_tcu_qhs_clk_ctl_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_compute_dsp_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_compute_dsp_list =
{
  3,
  route_alm_gpu_tcu_qhs_compute_dsp_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cp_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cp_list =
{
  4,
  route_alm_gpu_tcu_qhs_cp_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cpr_cx_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cpr_cx_list =
{
  3,
  route_alm_gpu_tcu_qhs_cpr_cx_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cpr_mmcx_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cpr_mmcx_list =
{
  3,
  route_alm_gpu_tcu_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cpr_mx_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cpr_mx_list =
{
  3,
  route_alm_gpu_tcu_qhs_cpr_mx_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_crypto0_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_crypto0_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_cx_rdpm_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_cx_rdpm_list =
{
  3,
  route_alm_gpu_tcu_qhs_cx_rdpm_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_dcc_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_dcc_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_dcc_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_display_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_display_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_display_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_dma_bwmon_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_dma_bwmon_list =
{
  4,
  route_alm_gpu_tcu_qhs_dma_bwmon_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_dpm_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_dpm_list =
{
  4,
  route_alm_gpu_tcu_qhs_dpm_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_gpuss_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_gpuss_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_imem_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_imem_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_imem_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ipa_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ipa_list =
{
  3,
  route_alm_gpu_tcu_qhs_ipa_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ipc_router_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ipc_router_list =
{
  3,
  route_alm_gpu_tcu_qhs_ipc_router_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_isense_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_isense_list =
{
  4,
  route_alm_gpu_tcu_qhs_isense_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_llcc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_llcc_list =
{
  4,
  route_alm_gpu_tcu_qhs_llcc_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_llm_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_llm_list =
{
  4,
  route_alm_gpu_tcu_qhs_llm_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_lpass_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_lpass_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_lpass_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_pcie0_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_pcie0_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_pcie1_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_pcie1_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_pcie_modem_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_pcie_modem_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_pdm_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_pdm_list =
{
  3,
  route_alm_gpu_tcu_qhs_pdm_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_pimem_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_pimem_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_pimem_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_prng_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_prng_list =
{
  3,
  route_alm_gpu_tcu_qhs_prng_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_qdss_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_qdss_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_qdss_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_qspi_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_qspi_list =
{
  3,
  route_alm_gpu_tcu_qhs_qspi_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_qup0_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_qup0_list =
{
  3,
  route_alm_gpu_tcu_qhs_qup0_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_qup1_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_qup1_list =
{
  3,
  route_alm_gpu_tcu_qhs_qup1_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_qup2_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_qup2_list =
{
  3,
  route_alm_gpu_tcu_qhs_qup2_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_sdc2_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_sdc2_list =
{
  3,
  route_alm_gpu_tcu_qhs_sdc2_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_sdc4_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_sdc4_list =
{
  3,
  route_alm_gpu_tcu_qhs_sdc4_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tcm_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tcm_list =
{
  4,
  route_alm_gpu_tcu_qhs_tcm_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tcsr_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tcsr_list =
{
  3,
  route_alm_gpu_tcu_qhs_tcsr_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tlmm0_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tlmm0_list =
{
  3,
  route_alm_gpu_tcu_qhs_tlmm0_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tlmm1_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tlmm1_list =
{
  3,
  route_alm_gpu_tcu_qhs_tlmm1_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tlmm2_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tlmm2_list =
{
  3,
  route_alm_gpu_tcu_qhs_tlmm2_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_tsif_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_tsif_list =
{
  3,
  route_alm_gpu_tcu_qhs_tsif_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ufs_card_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ufs_card_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_ufs_mem_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_ufs_mem_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_usb3_0_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_usb3_0_list =
{
  3,
  route_alm_gpu_tcu_qhs_usb3_0_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_usb3_1_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_usb3_1_list =
{
  3,
  route_alm_gpu_tcu_qhs_usb3_1_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_venus_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_venus_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_venus_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qhs_vsense_ctrl_cfg_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_qhs_vsense_ctrl_cfg_list =
{
  3,
  route_alm_gpu_tcu_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_alm_gpu_tcu_qns_llcc_list_array[1] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_alm_gpu_tcu_qns_llcc_list =
{
  1,
  route_alm_gpu_tcu_qns_llcc_list_array
};
static icb_pair_type route_alm_gpu_tcu_qxs_imem_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_alm_gpu_tcu_qxs_imem_list =
{
  2,
  route_alm_gpu_tcu_qxs_imem_list_array
};
static icb_pair_type route_alm_gpu_tcu_qxs_pimem_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_alm_gpu_tcu_qxs_pimem_list =
{
  2,
  route_alm_gpu_tcu_qxs_pimem_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_aggre1_noc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_aggre1_noc_list =
{
  4,
  route_alm_gpu_tcu_srvc_aggre1_noc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_aggre2_noc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_aggre2_noc_list =
{
  4,
  route_alm_gpu_tcu_srvc_aggre2_noc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_cnoc_list_array[3] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_cnoc_list =
{
  3,
  route_alm_gpu_tcu_srvc_cnoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_even_gemnoc_list_array[5] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_even_gemnoc_list =
{
  5,
  route_alm_gpu_tcu_srvc_even_gemnoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_mnoc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_mnoc_list =
{
  4,
  route_alm_gpu_tcu_srvc_mnoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_noc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_noc_list =
{
  4,
  route_alm_gpu_tcu_srvc_noc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_odd_gemnoc_list_array[5] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_odd_gemnoc_list =
{
  5,
  route_alm_gpu_tcu_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_snoc_list_array[4] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_snoc_list =
{
  4,
  route_alm_gpu_tcu_srvc_snoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_srvc_sys_gemnoc_list_array[5] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_alm_gpu_tcu_srvc_sys_gemnoc_list =
{
  5,
  route_alm_gpu_tcu_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_alm_gpu_tcu_xs_qdss_stm_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_alm_gpu_tcu_xs_qdss_stm_list =
{
  2,
  route_alm_gpu_tcu_xs_qdss_stm_list_array
};
static icb_pair_type route_alm_gpu_tcu_xs_sys_tcu_cfg_list_array[2] =
{
  {
    &master_alm_gpu_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_alm_gpu_tcu_xs_sys_tcu_cfg_list =
{
  2,
  route_alm_gpu_tcu_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_ebi_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_alm_sys_tcu_ebi_list =
{
  2,
  route_alm_sys_tcu_ebi_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ahb2phy0_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ahb2phy0_list =
{
  3,
  route_alm_sys_tcu_qhs_ahb2phy0_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ahb2phy1_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ahb2phy1_list =
{
  3,
  route_alm_sys_tcu_qhs_ahb2phy1_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_aoss_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_aoss_list =
{
  3,
  route_alm_sys_tcu_qhs_aoss_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_apss_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_apss_list =
{
  2,
  route_alm_sys_tcu_qhs_apss_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cal_dp0_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cal_dp0_list =
{
  4,
  route_alm_sys_tcu_qhs_cal_dp0_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cal_dp1_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cal_dp1_list =
{
  4,
  route_alm_sys_tcu_qhs_cal_dp1_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_camera_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_camera_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_camera_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_clk_ctl_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_clk_ctl_list =
{
  3,
  route_alm_sys_tcu_qhs_clk_ctl_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_compute_dsp_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_compute_dsp_list =
{
  3,
  route_alm_sys_tcu_qhs_compute_dsp_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cp_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cp_list =
{
  4,
  route_alm_sys_tcu_qhs_cp_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cpr_cx_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cpr_cx_list =
{
  3,
  route_alm_sys_tcu_qhs_cpr_cx_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cpr_mmcx_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cpr_mmcx_list =
{
  3,
  route_alm_sys_tcu_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cpr_mx_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cpr_mx_list =
{
  3,
  route_alm_sys_tcu_qhs_cpr_mx_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_crypto0_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_crypto0_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_cx_rdpm_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_cx_rdpm_list =
{
  3,
  route_alm_sys_tcu_qhs_cx_rdpm_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_dcc_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_dcc_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_dcc_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_display_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_display_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_display_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_dma_bwmon_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_dma_bwmon_list =
{
  4,
  route_alm_sys_tcu_qhs_dma_bwmon_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_dpm_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_dpm_list =
{
  4,
  route_alm_sys_tcu_qhs_dpm_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_gpuss_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_gpuss_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_imem_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_imem_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_imem_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ipa_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ipa_list =
{
  3,
  route_alm_sys_tcu_qhs_ipa_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ipc_router_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ipc_router_list =
{
  3,
  route_alm_sys_tcu_qhs_ipc_router_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_isense_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_isense_list =
{
  4,
  route_alm_sys_tcu_qhs_isense_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_llcc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_llcc_list =
{
  4,
  route_alm_sys_tcu_qhs_llcc_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_llm_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_llm_list =
{
  4,
  route_alm_sys_tcu_qhs_llm_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_lpass_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_lpass_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_lpass_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_pcie0_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_pcie0_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_pcie1_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_pcie1_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_pcie_modem_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_pcie_modem_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_pdm_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_pdm_list =
{
  3,
  route_alm_sys_tcu_qhs_pdm_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_pimem_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_pimem_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_pimem_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_prng_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_prng_list =
{
  3,
  route_alm_sys_tcu_qhs_prng_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_qdss_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_qdss_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_qdss_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_qspi_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_qspi_list =
{
  3,
  route_alm_sys_tcu_qhs_qspi_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_qup0_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_qup0_list =
{
  3,
  route_alm_sys_tcu_qhs_qup0_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_qup1_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_qup1_list =
{
  3,
  route_alm_sys_tcu_qhs_qup1_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_qup2_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_qup2_list =
{
  3,
  route_alm_sys_tcu_qhs_qup2_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_sdc2_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_sdc2_list =
{
  3,
  route_alm_sys_tcu_qhs_sdc2_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_sdc4_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_sdc4_list =
{
  3,
  route_alm_sys_tcu_qhs_sdc4_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tcm_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tcm_list =
{
  4,
  route_alm_sys_tcu_qhs_tcm_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tcsr_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tcsr_list =
{
  3,
  route_alm_sys_tcu_qhs_tcsr_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tlmm0_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tlmm0_list =
{
  3,
  route_alm_sys_tcu_qhs_tlmm0_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tlmm1_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tlmm1_list =
{
  3,
  route_alm_sys_tcu_qhs_tlmm1_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tlmm2_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tlmm2_list =
{
  3,
  route_alm_sys_tcu_qhs_tlmm2_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_tsif_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_tsif_list =
{
  3,
  route_alm_sys_tcu_qhs_tsif_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ufs_card_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ufs_card_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_ufs_mem_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_ufs_mem_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_usb3_0_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_usb3_0_list =
{
  3,
  route_alm_sys_tcu_qhs_usb3_0_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_usb3_1_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_usb3_1_list =
{
  3,
  route_alm_sys_tcu_qhs_usb3_1_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_venus_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_venus_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_venus_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qhs_vsense_ctrl_cfg_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_qhs_vsense_ctrl_cfg_list =
{
  3,
  route_alm_sys_tcu_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_alm_sys_tcu_qns_llcc_list_array[1] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_alm_sys_tcu_qns_llcc_list =
{
  1,
  route_alm_sys_tcu_qns_llcc_list_array
};
static icb_pair_type route_alm_sys_tcu_qxs_imem_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_alm_sys_tcu_qxs_imem_list =
{
  2,
  route_alm_sys_tcu_qxs_imem_list_array
};
static icb_pair_type route_alm_sys_tcu_qxs_pimem_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_alm_sys_tcu_qxs_pimem_list =
{
  2,
  route_alm_sys_tcu_qxs_pimem_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_aggre1_noc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_aggre1_noc_list =
{
  4,
  route_alm_sys_tcu_srvc_aggre1_noc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_aggre2_noc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_aggre2_noc_list =
{
  4,
  route_alm_sys_tcu_srvc_aggre2_noc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_cnoc_list_array[3] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_cnoc_list =
{
  3,
  route_alm_sys_tcu_srvc_cnoc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_even_gemnoc_list_array[5] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_even_gemnoc_list =
{
  5,
  route_alm_sys_tcu_srvc_even_gemnoc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_mnoc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_mnoc_list =
{
  4,
  route_alm_sys_tcu_srvc_mnoc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_noc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_noc_list =
{
  4,
  route_alm_sys_tcu_srvc_noc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_odd_gemnoc_list_array[5] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_odd_gemnoc_list =
{
  5,
  route_alm_sys_tcu_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_snoc_list_array[4] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_snoc_list =
{
  4,
  route_alm_sys_tcu_srvc_snoc_list_array
};
static icb_pair_type route_alm_sys_tcu_srvc_sys_gemnoc_list_array[5] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_alm_sys_tcu_srvc_sys_gemnoc_list =
{
  5,
  route_alm_sys_tcu_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_alm_sys_tcu_xs_qdss_stm_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_alm_sys_tcu_xs_qdss_stm_list =
{
  2,
  route_alm_sys_tcu_xs_qdss_stm_list_array
};
static icb_pair_type route_alm_sys_tcu_xs_sys_tcu_cfg_list_array[2] =
{
  {
    &master_alm_sys_tcu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_alm_sys_tcu_xs_sys_tcu_cfg_list =
{
  2,
  route_alm_sys_tcu_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_amm_npu_sys_cdp_w_qns_npu_sys_list_array[1] =
{
  {
    &master_amm_npu_sys_cdp_w,
    &slave_qns_npu_sys
  },
};
static icb_route_list_type route_amm_npu_sys_cdp_w_qns_npu_sys_list =
{
  1,
  route_amm_npu_sys_cdp_w_qns_npu_sys_list_array
};
static icb_pair_type route_amm_npu_sys_qns_npu_sys_list_array[1] =
{
  {
    &master_amm_npu_sys,
    &slave_qns_npu_sys
  },
};
static icb_route_list_type route_amm_npu_sys_qns_npu_sys_list =
{
  1,
  route_amm_npu_sys_qns_npu_sys_list_array
};
static icb_pair_type route_chm_apps_ebi_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_chm_apps_ebi_list =
{
  2,
  route_chm_apps_ebi_list_array
};
static icb_pair_type route_chm_apps_qhs_ahb2phy0_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_chm_apps_qhs_ahb2phy0_list =
{
  3,
  route_chm_apps_qhs_ahb2phy0_list_array
};
static icb_pair_type route_chm_apps_qhs_ahb2phy1_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_chm_apps_qhs_ahb2phy1_list =
{
  3,
  route_chm_apps_qhs_ahb2phy1_list_array
};
static icb_pair_type route_chm_apps_qhs_aoss_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_chm_apps_qhs_aoss_list =
{
  3,
  route_chm_apps_qhs_aoss_list_array
};
static icb_pair_type route_chm_apps_qhs_apss_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_chm_apps_qhs_apss_list =
{
  2,
  route_chm_apps_qhs_apss_list_array
};
static icb_pair_type route_chm_apps_qhs_cal_dp0_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_chm_apps_qhs_cal_dp0_list =
{
  4,
  route_chm_apps_qhs_cal_dp0_list_array
};
static icb_pair_type route_chm_apps_qhs_cal_dp1_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_chm_apps_qhs_cal_dp1_list =
{
  4,
  route_chm_apps_qhs_cal_dp1_list_array
};
static icb_pair_type route_chm_apps_qhs_camera_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_camera_cfg_list =
{
  3,
  route_chm_apps_qhs_camera_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_clk_ctl_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_chm_apps_qhs_clk_ctl_list =
{
  3,
  route_chm_apps_qhs_clk_ctl_list_array
};
static icb_pair_type route_chm_apps_qhs_compute_dsp_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_chm_apps_qhs_compute_dsp_list =
{
  3,
  route_chm_apps_qhs_compute_dsp_list_array
};
static icb_pair_type route_chm_apps_qhs_cp_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_chm_apps_qhs_cp_list =
{
  4,
  route_chm_apps_qhs_cp_list_array
};
static icb_pair_type route_chm_apps_qhs_cpr_cx_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_chm_apps_qhs_cpr_cx_list =
{
  3,
  route_chm_apps_qhs_cpr_cx_list_array
};
static icb_pair_type route_chm_apps_qhs_cpr_mmcx_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_chm_apps_qhs_cpr_mmcx_list =
{
  3,
  route_chm_apps_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_chm_apps_qhs_cpr_mx_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_chm_apps_qhs_cpr_mx_list =
{
  3,
  route_chm_apps_qhs_cpr_mx_list_array
};
static icb_pair_type route_chm_apps_qhs_crypto0_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_crypto0_cfg_list =
{
  3,
  route_chm_apps_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_cx_rdpm_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_chm_apps_qhs_cx_rdpm_list =
{
  3,
  route_chm_apps_qhs_cx_rdpm_list_array
};
static icb_pair_type route_chm_apps_qhs_dcc_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_dcc_cfg_list =
{
  3,
  route_chm_apps_qhs_dcc_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_display_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_display_cfg_list =
{
  3,
  route_chm_apps_qhs_display_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_dma_bwmon_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_chm_apps_qhs_dma_bwmon_list =
{
  4,
  route_chm_apps_qhs_dma_bwmon_list_array
};
static icb_pair_type route_chm_apps_qhs_dpm_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_chm_apps_qhs_dpm_list =
{
  4,
  route_chm_apps_qhs_dpm_list_array
};
static icb_pair_type route_chm_apps_qhs_gpuss_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_gpuss_cfg_list =
{
  3,
  route_chm_apps_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_imem_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_imem_cfg_list =
{
  3,
  route_chm_apps_qhs_imem_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_ipa_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_chm_apps_qhs_ipa_list =
{
  3,
  route_chm_apps_qhs_ipa_list_array
};
static icb_pair_type route_chm_apps_qhs_ipc_router_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_chm_apps_qhs_ipc_router_list =
{
  3,
  route_chm_apps_qhs_ipc_router_list_array
};
static icb_pair_type route_chm_apps_qhs_isense_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_chm_apps_qhs_isense_list =
{
  4,
  route_chm_apps_qhs_isense_list_array
};
static icb_pair_type route_chm_apps_qhs_llcc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_chm_apps_qhs_llcc_list =
{
  4,
  route_chm_apps_qhs_llcc_list_array
};
static icb_pair_type route_chm_apps_qhs_llm_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_chm_apps_qhs_llm_list =
{
  4,
  route_chm_apps_qhs_llm_list_array
};
static icb_pair_type route_chm_apps_qhs_lpass_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_lpass_cfg_list =
{
  3,
  route_chm_apps_qhs_lpass_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_pcie0_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_pcie0_cfg_list =
{
  3,
  route_chm_apps_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_pcie1_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_pcie1_cfg_list =
{
  3,
  route_chm_apps_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_pcie_modem_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_pcie_modem_cfg_list =
{
  3,
  route_chm_apps_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_pdm_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_chm_apps_qhs_pdm_list =
{
  3,
  route_chm_apps_qhs_pdm_list_array
};
static icb_pair_type route_chm_apps_qhs_pimem_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_pimem_cfg_list =
{
  3,
  route_chm_apps_qhs_pimem_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_prng_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_chm_apps_qhs_prng_list =
{
  3,
  route_chm_apps_qhs_prng_list_array
};
static icb_pair_type route_chm_apps_qhs_qdss_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_qdss_cfg_list =
{
  3,
  route_chm_apps_qhs_qdss_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_qspi_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_chm_apps_qhs_qspi_list =
{
  3,
  route_chm_apps_qhs_qspi_list_array
};
static icb_pair_type route_chm_apps_qhs_qup0_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_chm_apps_qhs_qup0_list =
{
  3,
  route_chm_apps_qhs_qup0_list_array
};
static icb_pair_type route_chm_apps_qhs_qup1_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_chm_apps_qhs_qup1_list =
{
  3,
  route_chm_apps_qhs_qup1_list_array
};
static icb_pair_type route_chm_apps_qhs_qup2_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_chm_apps_qhs_qup2_list =
{
  3,
  route_chm_apps_qhs_qup2_list_array
};
static icb_pair_type route_chm_apps_qhs_sdc2_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_chm_apps_qhs_sdc2_list =
{
  3,
  route_chm_apps_qhs_sdc2_list_array
};
static icb_pair_type route_chm_apps_qhs_sdc4_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_chm_apps_qhs_sdc4_list =
{
  3,
  route_chm_apps_qhs_sdc4_list_array
};
static icb_pair_type route_chm_apps_qhs_tcm_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_chm_apps_qhs_tcm_list =
{
  4,
  route_chm_apps_qhs_tcm_list_array
};
static icb_pair_type route_chm_apps_qhs_tcsr_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_chm_apps_qhs_tcsr_list =
{
  3,
  route_chm_apps_qhs_tcsr_list_array
};
static icb_pair_type route_chm_apps_qhs_tlmm0_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_chm_apps_qhs_tlmm0_list =
{
  3,
  route_chm_apps_qhs_tlmm0_list_array
};
static icb_pair_type route_chm_apps_qhs_tlmm1_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_chm_apps_qhs_tlmm1_list =
{
  3,
  route_chm_apps_qhs_tlmm1_list_array
};
static icb_pair_type route_chm_apps_qhs_tlmm2_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_chm_apps_qhs_tlmm2_list =
{
  3,
  route_chm_apps_qhs_tlmm2_list_array
};
static icb_pair_type route_chm_apps_qhs_tsif_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_chm_apps_qhs_tsif_list =
{
  3,
  route_chm_apps_qhs_tsif_list_array
};
static icb_pair_type route_chm_apps_qhs_ufs_card_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_ufs_card_cfg_list =
{
  3,
  route_chm_apps_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_ufs_mem_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_ufs_mem_cfg_list =
{
  3,
  route_chm_apps_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_usb3_0_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_chm_apps_qhs_usb3_0_list =
{
  3,
  route_chm_apps_qhs_usb3_0_list_array
};
static icb_pair_type route_chm_apps_qhs_usb3_1_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_chm_apps_qhs_usb3_1_list =
{
  3,
  route_chm_apps_qhs_usb3_1_list_array
};
static icb_pair_type route_chm_apps_qhs_venus_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_venus_cfg_list =
{
  3,
  route_chm_apps_qhs_venus_cfg_list_array
};
static icb_pair_type route_chm_apps_qhs_vsense_ctrl_cfg_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_chm_apps_qhs_vsense_ctrl_cfg_list =
{
  3,
  route_chm_apps_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_chm_apps_qns_llcc_list_array[1] =
{
  {
    &master_chm_apps,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_chm_apps_qns_llcc_list =
{
  1,
  route_chm_apps_qns_llcc_list_array
};
static icb_pair_type route_chm_apps_qxs_imem_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_chm_apps_qxs_imem_list =
{
  2,
  route_chm_apps_qxs_imem_list_array
};
static icb_pair_type route_chm_apps_qxs_pimem_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_chm_apps_qxs_pimem_list =
{
  2,
  route_chm_apps_qxs_pimem_list_array
};
static icb_pair_type route_chm_apps_srvc_aggre1_noc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_chm_apps_srvc_aggre1_noc_list =
{
  4,
  route_chm_apps_srvc_aggre1_noc_list_array
};
static icb_pair_type route_chm_apps_srvc_aggre2_noc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_chm_apps_srvc_aggre2_noc_list =
{
  4,
  route_chm_apps_srvc_aggre2_noc_list_array
};
static icb_pair_type route_chm_apps_srvc_cnoc_list_array[3] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_chm_apps_srvc_cnoc_list =
{
  3,
  route_chm_apps_srvc_cnoc_list_array
};
static icb_pair_type route_chm_apps_srvc_even_gemnoc_list_array[5] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_chm_apps_srvc_even_gemnoc_list =
{
  5,
  route_chm_apps_srvc_even_gemnoc_list_array
};
static icb_pair_type route_chm_apps_srvc_mnoc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_chm_apps_srvc_mnoc_list =
{
  4,
  route_chm_apps_srvc_mnoc_list_array
};
static icb_pair_type route_chm_apps_srvc_noc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_chm_apps_srvc_noc_list =
{
  4,
  route_chm_apps_srvc_noc_list_array
};
static icb_pair_type route_chm_apps_srvc_odd_gemnoc_list_array[5] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_chm_apps_srvc_odd_gemnoc_list =
{
  5,
  route_chm_apps_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_chm_apps_srvc_snoc_list_array[4] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_chm_apps_srvc_snoc_list =
{
  4,
  route_chm_apps_srvc_snoc_list_array
};
static icb_pair_type route_chm_apps_srvc_sys_gemnoc_list_array[5] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_chm_apps_srvc_sys_gemnoc_list =
{
  5,
  route_chm_apps_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_chm_apps_xs_pcie_0_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_chm_apps_xs_pcie_0_list =
{
  2,
  route_chm_apps_xs_pcie_0_list_array
};
static icb_pair_type route_chm_apps_xs_pcie_1_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_chm_apps_xs_pcie_1_list =
{
  2,
  route_chm_apps_xs_pcie_1_list_array
};
static icb_pair_type route_chm_apps_xs_pcie_modem_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_chm_apps_xs_pcie_modem_list =
{
  2,
  route_chm_apps_xs_pcie_modem_list_array
};
static icb_pair_type route_chm_apps_xs_qdss_stm_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_chm_apps_xs_qdss_stm_list =
{
  2,
  route_chm_apps_xs_qdss_stm_list_array
};
static icb_pair_type route_chm_apps_xs_sys_tcu_cfg_list_array[2] =
{
  {
    &master_chm_apps,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_chm_apps_xs_sys_tcu_cfg_list =
{
  2,
  route_chm_apps_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_llcc_mc_ebi_list_array[1] =
{
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_llcc_mc_ebi_list =
{
  1,
  route_llcc_mc_ebi_list_array
};
static icb_pair_type route_qhm_qdss_bam_ebi_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_qdss_bam_ebi_list =
{
  4,
  route_qhm_qdss_bam_ebi_list_array
};
static icb_pair_type route_qhm_qdss_bam_qhs_apss_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_qdss_bam_qhs_apss_list =
{
  4,
  route_qhm_qdss_bam_qhs_apss_list_array
};
static icb_pair_type route_qhm_qdss_bam_qns_llcc_list_array[3] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_qdss_bam_qns_llcc_list =
{
  3,
  route_qhm_qdss_bam_qns_llcc_list_array
};
static icb_pair_type route_qhm_qdss_bam_qxs_imem_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_qdss_bam_qxs_imem_list =
{
  4,
  route_qhm_qdss_bam_qxs_imem_list_array
};
static icb_pair_type route_qhm_qdss_bam_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_qdss_bam_qxs_pimem_list =
{
  4,
  route_qhm_qdss_bam_qxs_pimem_list_array
};
static icb_pair_type route_qhm_qdss_bam_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_qdss_bam_xs_pcie_0_list =
{
  4,
  route_qhm_qdss_bam_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_qdss_bam_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_qdss_bam_xs_pcie_1_list =
{
  4,
  route_qhm_qdss_bam_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_qdss_bam_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_qdss_bam_xs_pcie_modem_list =
{
  4,
  route_qhm_qdss_bam_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_qdss_bam_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_qdss_bam_xs_qdss_stm_list =
{
  4,
  route_qhm_qdss_bam_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_qdss_bam_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_qdss_bam,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_qdss_bam_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_qdss_bam_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qhm_qspi_ebi_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_qspi_ebi_list =
{
  4,
  route_qhm_qspi_ebi_list_array
};
static icb_pair_type route_qhm_qspi_qhs_apss_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_qspi_qhs_apss_list =
{
  4,
  route_qhm_qspi_qhs_apss_list_array
};
static icb_pair_type route_qhm_qspi_qns_llcc_list_array[3] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_qspi_qns_llcc_list =
{
  3,
  route_qhm_qspi_qns_llcc_list_array
};
static icb_pair_type route_qhm_qspi_qxs_imem_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_qspi_qxs_imem_list =
{
  4,
  route_qhm_qspi_qxs_imem_list_array
};
static icb_pair_type route_qhm_qspi_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_qspi_qxs_pimem_list =
{
  4,
  route_qhm_qspi_qxs_pimem_list_array
};
static icb_pair_type route_qhm_qspi_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_qspi_xs_pcie_0_list =
{
  4,
  route_qhm_qspi_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_qspi_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_qspi_xs_pcie_1_list =
{
  4,
  route_qhm_qspi_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_qspi_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_qspi_xs_pcie_modem_list =
{
  4,
  route_qhm_qspi_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_qspi_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_qspi_xs_qdss_stm_list =
{
  4,
  route_qhm_qspi_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_qspi_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_qspi,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_qspi_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_qspi_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qhm_qup0_ebi_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_qup0_ebi_list =
{
  4,
  route_qhm_qup0_ebi_list_array
};
static icb_pair_type route_qhm_qup0_qhs_apss_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_qup0_qhs_apss_list =
{
  4,
  route_qhm_qup0_qhs_apss_list_array
};
static icb_pair_type route_qhm_qup0_qns_llcc_list_array[3] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_qup0_qns_llcc_list =
{
  3,
  route_qhm_qup0_qns_llcc_list_array
};
static icb_pair_type route_qhm_qup0_qxs_imem_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_qup0_qxs_imem_list =
{
  4,
  route_qhm_qup0_qxs_imem_list_array
};
static icb_pair_type route_qhm_qup0_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_qup0_qxs_pimem_list =
{
  4,
  route_qhm_qup0_qxs_pimem_list_array
};
static icb_pair_type route_qhm_qup0_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_qup0_xs_pcie_0_list =
{
  4,
  route_qhm_qup0_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_qup0_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_qup0_xs_pcie_1_list =
{
  4,
  route_qhm_qup0_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_qup0_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_qup0_xs_pcie_modem_list =
{
  4,
  route_qhm_qup0_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_qup0_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_qup0_xs_qdss_stm_list =
{
  4,
  route_qhm_qup0_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_qup0_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_qup0,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_qup0_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_qup0_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qhm_qup1_ebi_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_qup1_ebi_list =
{
  4,
  route_qhm_qup1_ebi_list_array
};
static icb_pair_type route_qhm_qup1_qhs_apss_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_qup1_qhs_apss_list =
{
  4,
  route_qhm_qup1_qhs_apss_list_array
};
static icb_pair_type route_qhm_qup1_qns_llcc_list_array[3] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_qup1_qns_llcc_list =
{
  3,
  route_qhm_qup1_qns_llcc_list_array
};
static icb_pair_type route_qhm_qup1_qxs_imem_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_qup1_qxs_imem_list =
{
  4,
  route_qhm_qup1_qxs_imem_list_array
};
static icb_pair_type route_qhm_qup1_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_qup1_qxs_pimem_list =
{
  4,
  route_qhm_qup1_qxs_pimem_list_array
};
static icb_pair_type route_qhm_qup1_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_qup1_xs_pcie_0_list =
{
  4,
  route_qhm_qup1_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_qup1_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_qup1_xs_pcie_1_list =
{
  4,
  route_qhm_qup1_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_qup1_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_qup1_xs_pcie_modem_list =
{
  4,
  route_qhm_qup1_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_qup1_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_qup1_xs_qdss_stm_list =
{
  4,
  route_qhm_qup1_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_qup1_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_qup1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_qup1_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_qup1_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qhm_qup2_ebi_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_qup2_ebi_list =
{
  4,
  route_qhm_qup2_ebi_list_array
};
static icb_pair_type route_qhm_qup2_qhs_apss_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_qup2_qhs_apss_list =
{
  4,
  route_qhm_qup2_qhs_apss_list_array
};
static icb_pair_type route_qhm_qup2_qns_llcc_list_array[3] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_qup2_qns_llcc_list =
{
  3,
  route_qhm_qup2_qns_llcc_list_array
};
static icb_pair_type route_qhm_qup2_qxs_imem_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_qup2_qxs_imem_list =
{
  4,
  route_qhm_qup2_qxs_imem_list_array
};
static icb_pair_type route_qhm_qup2_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_qup2_qxs_pimem_list =
{
  4,
  route_qhm_qup2_qxs_pimem_list_array
};
static icb_pair_type route_qhm_qup2_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_qup2_xs_pcie_0_list =
{
  4,
  route_qhm_qup2_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_qup2_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_qup2_xs_pcie_1_list =
{
  4,
  route_qhm_qup2_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_qup2_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_qup2_xs_pcie_modem_list =
{
  4,
  route_qhm_qup2_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_qup2_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_qup2_xs_qdss_stm_list =
{
  4,
  route_qhm_qup2_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_qup2_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_qup2,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_qup2_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_qup2_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qhm_tsif_ebi_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qhm_tsif_ebi_list =
{
  4,
  route_qhm_tsif_ebi_list_array
};
static icb_pair_type route_qhm_tsif_qhs_apss_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qhm_tsif_qhs_apss_list =
{
  4,
  route_qhm_tsif_qhs_apss_list_array
};
static icb_pair_type route_qhm_tsif_qns_llcc_list_array[3] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qhm_tsif_qns_llcc_list =
{
  3,
  route_qhm_tsif_qns_llcc_list_array
};
static icb_pair_type route_qhm_tsif_qxs_imem_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qhm_tsif_qxs_imem_list =
{
  4,
  route_qhm_tsif_qxs_imem_list_array
};
static icb_pair_type route_qhm_tsif_qxs_pimem_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qhm_tsif_qxs_pimem_list =
{
  4,
  route_qhm_tsif_qxs_pimem_list_array
};
static icb_pair_type route_qhm_tsif_xs_pcie_0_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qhm_tsif_xs_pcie_0_list =
{
  4,
  route_qhm_tsif_xs_pcie_0_list_array
};
static icb_pair_type route_qhm_tsif_xs_pcie_1_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qhm_tsif_xs_pcie_1_list =
{
  4,
  route_qhm_tsif_xs_pcie_1_list_array
};
static icb_pair_type route_qhm_tsif_xs_pcie_modem_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qhm_tsif_xs_pcie_modem_list =
{
  4,
  route_qhm_tsif_xs_pcie_modem_list_array
};
static icb_pair_type route_qhm_tsif_xs_qdss_stm_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qhm_tsif_xs_qdss_stm_list =
{
  4,
  route_qhm_tsif_xs_qdss_stm_list_array
};
static icb_pair_type route_qhm_tsif_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qhm_tsif,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qhm_tsif_xs_sys_tcu_cfg_list =
{
  4,
  route_qhm_tsif_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_camnoc_hf_ebi_list_array[3] =
{
  {
    &master_qnm_camnoc_hf,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_camnoc_hf_ebi_list =
{
  3,
  route_qnm_camnoc_hf_ebi_list_array
};
static icb_pair_type route_qnm_camnoc_hf_qns_llcc_list_array[2] =
{
  {
    &master_qnm_camnoc_hf,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_camnoc_hf_qns_llcc_list =
{
  2,
  route_qnm_camnoc_hf_qns_llcc_list_array
};
static icb_pair_type route_qnm_camnoc_icp_ebi_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_camnoc_icp_ebi_list =
{
  3,
  route_qnm_camnoc_icp_ebi_list_array
};
static icb_pair_type route_qnm_camnoc_icp_qhs_apss_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_camnoc_icp_qhs_apss_list =
{
  3,
  route_qnm_camnoc_icp_qhs_apss_list_array
};
static icb_pair_type route_qnm_camnoc_icp_qns_llcc_list_array[2] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_camnoc_icp_qns_llcc_list =
{
  2,
  route_qnm_camnoc_icp_qns_llcc_list_array
};
static icb_pair_type route_qnm_camnoc_icp_qxs_imem_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_camnoc_icp_qxs_imem_list =
{
  3,
  route_qnm_camnoc_icp_qxs_imem_list_array
};
static icb_pair_type route_qnm_camnoc_icp_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_camnoc_icp_qxs_pimem_list =
{
  3,
  route_qnm_camnoc_icp_qxs_pimem_list_array
};
static icb_pair_type route_qnm_camnoc_icp_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_camnoc_icp_xs_qdss_stm_list =
{
  3,
  route_qnm_camnoc_icp_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_camnoc_icp_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_camnoc_icp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_camnoc_icp_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_camnoc_icp_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_camnoc_sf_ebi_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_camnoc_sf_ebi_list =
{
  3,
  route_qnm_camnoc_sf_ebi_list_array
};
static icb_pair_type route_qnm_camnoc_sf_qhs_apss_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_camnoc_sf_qhs_apss_list =
{
  3,
  route_qnm_camnoc_sf_qhs_apss_list_array
};
static icb_pair_type route_qnm_camnoc_sf_qns_llcc_list_array[2] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_camnoc_sf_qns_llcc_list =
{
  2,
  route_qnm_camnoc_sf_qns_llcc_list_array
};
static icb_pair_type route_qnm_camnoc_sf_qxs_imem_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_camnoc_sf_qxs_imem_list =
{
  3,
  route_qnm_camnoc_sf_qxs_imem_list_array
};
static icb_pair_type route_qnm_camnoc_sf_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_camnoc_sf_qxs_pimem_list =
{
  3,
  route_qnm_camnoc_sf_qxs_pimem_list_array
};
static icb_pair_type route_qnm_camnoc_sf_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_camnoc_sf_xs_qdss_stm_list =
{
  3,
  route_qnm_camnoc_sf_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_camnoc_sf_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_camnoc_sf,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_camnoc_sf_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_camnoc_sf_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_gpu_ebi_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_gpu_ebi_list =
{
  2,
  route_qnm_gpu_ebi_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ahb2phy0_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ahb2phy0_list =
{
  3,
  route_qnm_gpu_qhs_ahb2phy0_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ahb2phy1_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ahb2phy1_list =
{
  3,
  route_qnm_gpu_qhs_ahb2phy1_list_array
};
static icb_pair_type route_qnm_gpu_qhs_aoss_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_qnm_gpu_qhs_aoss_list =
{
  3,
  route_qnm_gpu_qhs_aoss_list_array
};
static icb_pair_type route_qnm_gpu_qhs_apss_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_gpu_qhs_apss_list =
{
  2,
  route_qnm_gpu_qhs_apss_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cal_dp0_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cal_dp0_list =
{
  4,
  route_qnm_gpu_qhs_cal_dp0_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cal_dp1_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cal_dp1_list =
{
  4,
  route_qnm_gpu_qhs_cal_dp1_list_array
};
static icb_pair_type route_qnm_gpu_qhs_camera_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_camera_cfg_list =
{
  3,
  route_qnm_gpu_qhs_camera_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_clk_ctl_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_qnm_gpu_qhs_clk_ctl_list =
{
  3,
  route_qnm_gpu_qhs_clk_ctl_list_array
};
static icb_pair_type route_qnm_gpu_qhs_compute_dsp_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_qnm_gpu_qhs_compute_dsp_list =
{
  3,
  route_qnm_gpu_qhs_compute_dsp_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cp_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cp_list =
{
  4,
  route_qnm_gpu_qhs_cp_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cpr_cx_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cpr_cx_list =
{
  3,
  route_qnm_gpu_qhs_cpr_cx_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cpr_mmcx_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cpr_mmcx_list =
{
  3,
  route_qnm_gpu_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cpr_mx_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cpr_mx_list =
{
  3,
  route_qnm_gpu_qhs_cpr_mx_list_array
};
static icb_pair_type route_qnm_gpu_qhs_crypto0_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_crypto0_cfg_list =
{
  3,
  route_qnm_gpu_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_cx_rdpm_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_qnm_gpu_qhs_cx_rdpm_list =
{
  3,
  route_qnm_gpu_qhs_cx_rdpm_list_array
};
static icb_pair_type route_qnm_gpu_qhs_dcc_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_dcc_cfg_list =
{
  3,
  route_qnm_gpu_qhs_dcc_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_display_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_display_cfg_list =
{
  3,
  route_qnm_gpu_qhs_display_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_dma_bwmon_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_qnm_gpu_qhs_dma_bwmon_list =
{
  4,
  route_qnm_gpu_qhs_dma_bwmon_list_array
};
static icb_pair_type route_qnm_gpu_qhs_dpm_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_qnm_gpu_qhs_dpm_list =
{
  4,
  route_qnm_gpu_qhs_dpm_list_array
};
static icb_pair_type route_qnm_gpu_qhs_gpuss_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_gpuss_cfg_list =
{
  3,
  route_qnm_gpu_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_imem_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_imem_cfg_list =
{
  3,
  route_qnm_gpu_qhs_imem_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ipa_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ipa_list =
{
  3,
  route_qnm_gpu_qhs_ipa_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ipc_router_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ipc_router_list =
{
  3,
  route_qnm_gpu_qhs_ipc_router_list_array
};
static icb_pair_type route_qnm_gpu_qhs_isense_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_qnm_gpu_qhs_isense_list =
{
  4,
  route_qnm_gpu_qhs_isense_list_array
};
static icb_pair_type route_qnm_gpu_qhs_llcc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_qnm_gpu_qhs_llcc_list =
{
  4,
  route_qnm_gpu_qhs_llcc_list_array
};
static icb_pair_type route_qnm_gpu_qhs_llm_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_qnm_gpu_qhs_llm_list =
{
  4,
  route_qnm_gpu_qhs_llm_list_array
};
static icb_pair_type route_qnm_gpu_qhs_lpass_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_lpass_cfg_list =
{
  3,
  route_qnm_gpu_qhs_lpass_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_pcie0_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_pcie0_cfg_list =
{
  3,
  route_qnm_gpu_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_pcie1_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_pcie1_cfg_list =
{
  3,
  route_qnm_gpu_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_pcie_modem_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_pcie_modem_cfg_list =
{
  3,
  route_qnm_gpu_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_pdm_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_qnm_gpu_qhs_pdm_list =
{
  3,
  route_qnm_gpu_qhs_pdm_list_array
};
static icb_pair_type route_qnm_gpu_qhs_pimem_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_pimem_cfg_list =
{
  3,
  route_qnm_gpu_qhs_pimem_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_prng_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_qnm_gpu_qhs_prng_list =
{
  3,
  route_qnm_gpu_qhs_prng_list_array
};
static icb_pair_type route_qnm_gpu_qhs_qdss_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_qdss_cfg_list =
{
  3,
  route_qnm_gpu_qhs_qdss_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_qspi_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_qnm_gpu_qhs_qspi_list =
{
  3,
  route_qnm_gpu_qhs_qspi_list_array
};
static icb_pair_type route_qnm_gpu_qhs_qup0_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_qnm_gpu_qhs_qup0_list =
{
  3,
  route_qnm_gpu_qhs_qup0_list_array
};
static icb_pair_type route_qnm_gpu_qhs_qup1_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_qnm_gpu_qhs_qup1_list =
{
  3,
  route_qnm_gpu_qhs_qup1_list_array
};
static icb_pair_type route_qnm_gpu_qhs_qup2_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_qnm_gpu_qhs_qup2_list =
{
  3,
  route_qnm_gpu_qhs_qup2_list_array
};
static icb_pair_type route_qnm_gpu_qhs_sdc2_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_qnm_gpu_qhs_sdc2_list =
{
  3,
  route_qnm_gpu_qhs_sdc2_list_array
};
static icb_pair_type route_qnm_gpu_qhs_sdc4_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_qnm_gpu_qhs_sdc4_list =
{
  3,
  route_qnm_gpu_qhs_sdc4_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tcm_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tcm_list =
{
  4,
  route_qnm_gpu_qhs_tcm_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tcsr_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tcsr_list =
{
  3,
  route_qnm_gpu_qhs_tcsr_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tlmm0_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tlmm0_list =
{
  3,
  route_qnm_gpu_qhs_tlmm0_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tlmm1_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tlmm1_list =
{
  3,
  route_qnm_gpu_qhs_tlmm1_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tlmm2_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tlmm2_list =
{
  3,
  route_qnm_gpu_qhs_tlmm2_list_array
};
static icb_pair_type route_qnm_gpu_qhs_tsif_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_qnm_gpu_qhs_tsif_list =
{
  3,
  route_qnm_gpu_qhs_tsif_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ufs_card_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ufs_card_cfg_list =
{
  3,
  route_qnm_gpu_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_ufs_mem_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_ufs_mem_cfg_list =
{
  3,
  route_qnm_gpu_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_usb3_0_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_qnm_gpu_qhs_usb3_0_list =
{
  3,
  route_qnm_gpu_qhs_usb3_0_list_array
};
static icb_pair_type route_qnm_gpu_qhs_usb3_1_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_qnm_gpu_qhs_usb3_1_list =
{
  3,
  route_qnm_gpu_qhs_usb3_1_list_array
};
static icb_pair_type route_qnm_gpu_qhs_venus_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_venus_cfg_list =
{
  3,
  route_qnm_gpu_qhs_venus_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qhs_vsense_ctrl_cfg_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_qnm_gpu_qhs_vsense_ctrl_cfg_list =
{
  3,
  route_qnm_gpu_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_qnm_gpu_qns_llcc_list_array[1] =
{
  {
    &master_qnm_gpu,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_gpu_qns_llcc_list =
{
  1,
  route_qnm_gpu_qns_llcc_list_array
};
static icb_pair_type route_qnm_gpu_qxs_imem_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_gpu_qxs_imem_list =
{
  2,
  route_qnm_gpu_qxs_imem_list_array
};
static icb_pair_type route_qnm_gpu_qxs_pimem_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_gpu_qxs_pimem_list =
{
  2,
  route_qnm_gpu_qxs_pimem_list_array
};
static icb_pair_type route_qnm_gpu_srvc_aggre1_noc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_aggre1_noc_list =
{
  4,
  route_qnm_gpu_srvc_aggre1_noc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_aggre2_noc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_aggre2_noc_list =
{
  4,
  route_qnm_gpu_srvc_aggre2_noc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_cnoc_list_array[3] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_cnoc_list =
{
  3,
  route_qnm_gpu_srvc_cnoc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_even_gemnoc_list_array[5] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_even_gemnoc_list =
{
  5,
  route_qnm_gpu_srvc_even_gemnoc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_mnoc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_mnoc_list =
{
  4,
  route_qnm_gpu_srvc_mnoc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_noc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_noc_list =
{
  4,
  route_qnm_gpu_srvc_noc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_odd_gemnoc_list_array[5] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_odd_gemnoc_list =
{
  5,
  route_qnm_gpu_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_snoc_list_array[4] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_snoc_list =
{
  4,
  route_qnm_gpu_srvc_snoc_list_array
};
static icb_pair_type route_qnm_gpu_srvc_sys_gemnoc_list_array[5] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_qnm_gpu_srvc_sys_gemnoc_list =
{
  5,
  route_qnm_gpu_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_qnm_gpu_xs_qdss_stm_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_gpu_xs_qdss_stm_list =
{
  2,
  route_qnm_gpu_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_gpu_xs_sys_tcu_cfg_list_array[2] =
{
  {
    &master_qnm_gpu,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_gpu_xs_sys_tcu_cfg_list =
{
  2,
  route_qnm_gpu_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_npu_ebi_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_npu_ebi_list =
{
  3,
  route_qnm_npu_ebi_list_array
};
static icb_pair_type route_qnm_npu_qhs_ahb2phy0_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_qnm_npu_qhs_ahb2phy0_list =
{
  4,
  route_qnm_npu_qhs_ahb2phy0_list_array
};
static icb_pair_type route_qnm_npu_qhs_ahb2phy1_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_qnm_npu_qhs_ahb2phy1_list =
{
  4,
  route_qnm_npu_qhs_ahb2phy1_list_array
};
static icb_pair_type route_qnm_npu_qhs_aoss_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_qnm_npu_qhs_aoss_list =
{
  4,
  route_qnm_npu_qhs_aoss_list_array
};
static icb_pair_type route_qnm_npu_qhs_apss_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_npu_qhs_apss_list =
{
  3,
  route_qnm_npu_qhs_apss_list_array
};
static icb_pair_type route_qnm_npu_qhs_cal_dp0_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_qnm_npu_qhs_cal_dp0_list =
{
  5,
  route_qnm_npu_qhs_cal_dp0_list_array
};
static icb_pair_type route_qnm_npu_qhs_cal_dp1_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_qnm_npu_qhs_cal_dp1_list =
{
  5,
  route_qnm_npu_qhs_cal_dp1_list_array
};
static icb_pair_type route_qnm_npu_qhs_camera_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_camera_cfg_list =
{
  4,
  route_qnm_npu_qhs_camera_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_clk_ctl_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_qnm_npu_qhs_clk_ctl_list =
{
  4,
  route_qnm_npu_qhs_clk_ctl_list_array
};
static icb_pair_type route_qnm_npu_qhs_compute_dsp_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_qnm_npu_qhs_compute_dsp_list =
{
  4,
  route_qnm_npu_qhs_compute_dsp_list_array
};
static icb_pair_type route_qnm_npu_qhs_cp_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_qnm_npu_qhs_cp_list =
{
  5,
  route_qnm_npu_qhs_cp_list_array
};
static icb_pair_type route_qnm_npu_qhs_cpr_cx_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_qnm_npu_qhs_cpr_cx_list =
{
  4,
  route_qnm_npu_qhs_cpr_cx_list_array
};
static icb_pair_type route_qnm_npu_qhs_cpr_mmcx_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_qnm_npu_qhs_cpr_mmcx_list =
{
  4,
  route_qnm_npu_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_qnm_npu_qhs_cpr_mx_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_qnm_npu_qhs_cpr_mx_list =
{
  4,
  route_qnm_npu_qhs_cpr_mx_list_array
};
static icb_pair_type route_qnm_npu_qhs_crypto0_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_crypto0_cfg_list =
{
  4,
  route_qnm_npu_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_cx_rdpm_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_qnm_npu_qhs_cx_rdpm_list =
{
  4,
  route_qnm_npu_qhs_cx_rdpm_list_array
};
static icb_pair_type route_qnm_npu_qhs_dcc_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_dcc_cfg_list =
{
  4,
  route_qnm_npu_qhs_dcc_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_display_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_display_cfg_list =
{
  4,
  route_qnm_npu_qhs_display_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_dma_bwmon_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_qnm_npu_qhs_dma_bwmon_list =
{
  5,
  route_qnm_npu_qhs_dma_bwmon_list_array
};
static icb_pair_type route_qnm_npu_qhs_dpm_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_qnm_npu_qhs_dpm_list =
{
  5,
  route_qnm_npu_qhs_dpm_list_array
};
static icb_pair_type route_qnm_npu_qhs_gpuss_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_gpuss_cfg_list =
{
  4,
  route_qnm_npu_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_imem_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_imem_cfg_list =
{
  4,
  route_qnm_npu_qhs_imem_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_ipa_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_qnm_npu_qhs_ipa_list =
{
  4,
  route_qnm_npu_qhs_ipa_list_array
};
static icb_pair_type route_qnm_npu_qhs_ipc_router_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_qnm_npu_qhs_ipc_router_list =
{
  4,
  route_qnm_npu_qhs_ipc_router_list_array
};
static icb_pair_type route_qnm_npu_qhs_isense_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_qnm_npu_qhs_isense_list =
{
  5,
  route_qnm_npu_qhs_isense_list_array
};
static icb_pair_type route_qnm_npu_qhs_llcc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_qnm_npu_qhs_llcc_list =
{
  5,
  route_qnm_npu_qhs_llcc_list_array
};
static icb_pair_type route_qnm_npu_qhs_llm_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_qnm_npu_qhs_llm_list =
{
  5,
  route_qnm_npu_qhs_llm_list_array
};
static icb_pair_type route_qnm_npu_qhs_lpass_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_lpass_cfg_list =
{
  4,
  route_qnm_npu_qhs_lpass_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_pcie0_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_pcie0_cfg_list =
{
  4,
  route_qnm_npu_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_pcie1_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_pcie1_cfg_list =
{
  4,
  route_qnm_npu_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_pcie_modem_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_pcie_modem_cfg_list =
{
  4,
  route_qnm_npu_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_pdm_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_qnm_npu_qhs_pdm_list =
{
  4,
  route_qnm_npu_qhs_pdm_list_array
};
static icb_pair_type route_qnm_npu_qhs_pimem_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_pimem_cfg_list =
{
  4,
  route_qnm_npu_qhs_pimem_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_prng_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_qnm_npu_qhs_prng_list =
{
  4,
  route_qnm_npu_qhs_prng_list_array
};
static icb_pair_type route_qnm_npu_qhs_qdss_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_qdss_cfg_list =
{
  4,
  route_qnm_npu_qhs_qdss_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_qspi_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_qnm_npu_qhs_qspi_list =
{
  4,
  route_qnm_npu_qhs_qspi_list_array
};
static icb_pair_type route_qnm_npu_qhs_qup0_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_qnm_npu_qhs_qup0_list =
{
  4,
  route_qnm_npu_qhs_qup0_list_array
};
static icb_pair_type route_qnm_npu_qhs_qup1_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_qnm_npu_qhs_qup1_list =
{
  4,
  route_qnm_npu_qhs_qup1_list_array
};
static icb_pair_type route_qnm_npu_qhs_qup2_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_qnm_npu_qhs_qup2_list =
{
  4,
  route_qnm_npu_qhs_qup2_list_array
};
static icb_pair_type route_qnm_npu_qhs_sdc2_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_qnm_npu_qhs_sdc2_list =
{
  4,
  route_qnm_npu_qhs_sdc2_list_array
};
static icb_pair_type route_qnm_npu_qhs_sdc4_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_qnm_npu_qhs_sdc4_list =
{
  4,
  route_qnm_npu_qhs_sdc4_list_array
};
static icb_pair_type route_qnm_npu_qhs_tcm_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_qnm_npu_qhs_tcm_list =
{
  5,
  route_qnm_npu_qhs_tcm_list_array
};
static icb_pair_type route_qnm_npu_qhs_tcsr_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_qnm_npu_qhs_tcsr_list =
{
  4,
  route_qnm_npu_qhs_tcsr_list_array
};
static icb_pair_type route_qnm_npu_qhs_tlmm0_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_qnm_npu_qhs_tlmm0_list =
{
  4,
  route_qnm_npu_qhs_tlmm0_list_array
};
static icb_pair_type route_qnm_npu_qhs_tlmm1_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_qnm_npu_qhs_tlmm1_list =
{
  4,
  route_qnm_npu_qhs_tlmm1_list_array
};
static icb_pair_type route_qnm_npu_qhs_tlmm2_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_qnm_npu_qhs_tlmm2_list =
{
  4,
  route_qnm_npu_qhs_tlmm2_list_array
};
static icb_pair_type route_qnm_npu_qhs_tsif_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_qnm_npu_qhs_tsif_list =
{
  4,
  route_qnm_npu_qhs_tsif_list_array
};
static icb_pair_type route_qnm_npu_qhs_ufs_card_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_ufs_card_cfg_list =
{
  4,
  route_qnm_npu_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_ufs_mem_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_ufs_mem_cfg_list =
{
  4,
  route_qnm_npu_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_usb3_0_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_qnm_npu_qhs_usb3_0_list =
{
  4,
  route_qnm_npu_qhs_usb3_0_list_array
};
static icb_pair_type route_qnm_npu_qhs_usb3_1_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_qnm_npu_qhs_usb3_1_list =
{
  4,
  route_qnm_npu_qhs_usb3_1_list_array
};
static icb_pair_type route_qnm_npu_qhs_venus_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_venus_cfg_list =
{
  4,
  route_qnm_npu_qhs_venus_cfg_list_array
};
static icb_pair_type route_qnm_npu_qhs_vsense_ctrl_cfg_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_qnm_npu_qhs_vsense_ctrl_cfg_list =
{
  4,
  route_qnm_npu_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_qnm_npu_qns_llcc_list_array[2] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_npu_qns_llcc_list =
{
  2,
  route_qnm_npu_qns_llcc_list_array
};
static icb_pair_type route_qnm_npu_qxs_imem_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_npu_qxs_imem_list =
{
  3,
  route_qnm_npu_qxs_imem_list_array
};
static icb_pair_type route_qnm_npu_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_npu_qxs_pimem_list =
{
  3,
  route_qnm_npu_qxs_pimem_list_array
};
static icb_pair_type route_qnm_npu_srvc_aggre1_noc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_qnm_npu_srvc_aggre1_noc_list =
{
  5,
  route_qnm_npu_srvc_aggre1_noc_list_array
};
static icb_pair_type route_qnm_npu_srvc_aggre2_noc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_qnm_npu_srvc_aggre2_noc_list =
{
  5,
  route_qnm_npu_srvc_aggre2_noc_list_array
};
static icb_pair_type route_qnm_npu_srvc_cnoc_list_array[4] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_cnoc_list =
{
  4,
  route_qnm_npu_srvc_cnoc_list_array
};
static icb_pair_type route_qnm_npu_srvc_even_gemnoc_list_array[6] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_even_gemnoc_list =
{
  6,
  route_qnm_npu_srvc_even_gemnoc_list_array
};
static icb_pair_type route_qnm_npu_srvc_mnoc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_mnoc_list =
{
  5,
  route_qnm_npu_srvc_mnoc_list_array
};
static icb_pair_type route_qnm_npu_srvc_noc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_qnm_npu_srvc_noc_list =
{
  5,
  route_qnm_npu_srvc_noc_list_array
};
static icb_pair_type route_qnm_npu_srvc_odd_gemnoc_list_array[6] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_odd_gemnoc_list =
{
  6,
  route_qnm_npu_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_qnm_npu_srvc_snoc_list_array[5] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_snoc_list =
{
  5,
  route_qnm_npu_srvc_snoc_list_array
};
static icb_pair_type route_qnm_npu_srvc_sys_gemnoc_list_array[6] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qns_cnoc
  },
  {
    &master_qnm_snoc,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_qnm_npu_srvc_sys_gemnoc_list =
{
  6,
  route_qnm_npu_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_qnm_npu_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_npu_xs_qdss_stm_list =
{
  3,
  route_qnm_npu_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_npu_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_npu,
    &slave_qns_cdsp_mem_noc
  },
  {
    &master_qnm_cmpnoc,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_npu_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_npu_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_video0_ebi_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_video0_ebi_list =
{
  3,
  route_qnm_video0_ebi_list_array
};
static icb_pair_type route_qnm_video0_qhs_apss_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_video0_qhs_apss_list =
{
  3,
  route_qnm_video0_qhs_apss_list_array
};
static icb_pair_type route_qnm_video0_qns_llcc_list_array[2] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_video0_qns_llcc_list =
{
  2,
  route_qnm_video0_qns_llcc_list_array
};
static icb_pair_type route_qnm_video0_qxs_imem_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_video0_qxs_imem_list =
{
  3,
  route_qnm_video0_qxs_imem_list_array
};
static icb_pair_type route_qnm_video0_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_video0_qxs_pimem_list =
{
  3,
  route_qnm_video0_qxs_pimem_list_array
};
static icb_pair_type route_qnm_video0_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_video0_xs_qdss_stm_list =
{
  3,
  route_qnm_video0_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_video0_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_video0,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_video0_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_video0_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_video1_ebi_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_video1_ebi_list =
{
  3,
  route_qnm_video1_ebi_list_array
};
static icb_pair_type route_qnm_video1_qhs_apss_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_video1_qhs_apss_list =
{
  3,
  route_qnm_video1_qhs_apss_list_array
};
static icb_pair_type route_qnm_video1_qns_llcc_list_array[2] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_video1_qns_llcc_list =
{
  2,
  route_qnm_video1_qns_llcc_list_array
};
static icb_pair_type route_qnm_video1_qxs_imem_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_video1_qxs_imem_list =
{
  3,
  route_qnm_video1_qxs_imem_list_array
};
static icb_pair_type route_qnm_video1_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_video1_qxs_pimem_list =
{
  3,
  route_qnm_video1_qxs_pimem_list_array
};
static icb_pair_type route_qnm_video1_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_video1_xs_qdss_stm_list =
{
  3,
  route_qnm_video1_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_video1_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_video1,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_video1_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_video1_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qnm_video_cvp_ebi_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qnm_video_cvp_ebi_list =
{
  3,
  route_qnm_video_cvp_ebi_list_array
};
static icb_pair_type route_qnm_video_cvp_qhs_apss_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qnm_video_cvp_qhs_apss_list =
{
  3,
  route_qnm_video_cvp_qhs_apss_list_array
};
static icb_pair_type route_qnm_video_cvp_qns_llcc_list_array[2] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qnm_video_cvp_qns_llcc_list =
{
  2,
  route_qnm_video_cvp_qns_llcc_list_array
};
static icb_pair_type route_qnm_video_cvp_qxs_imem_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qnm_video_cvp_qxs_imem_list =
{
  3,
  route_qnm_video_cvp_qxs_imem_list_array
};
static icb_pair_type route_qnm_video_cvp_qxs_pimem_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qnm_video_cvp_qxs_pimem_list =
{
  3,
  route_qnm_video_cvp_qxs_pimem_list_array
};
static icb_pair_type route_qnm_video_cvp_xs_qdss_stm_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qnm_video_cvp_xs_qdss_stm_list =
{
  3,
  route_qnm_video_cvp_xs_qdss_stm_list_array
};
static icb_pair_type route_qnm_video_cvp_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qnm_video_cvp,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qnm_video_cvp_xs_sys_tcu_cfg_list =
{
  3,
  route_qnm_video_cvp_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_list_array[1] =
{
  {
    &master_qxm_camnoc_hf0_uncomp,
    &slave_qns_camnoc_uncomp
  },
};
static icb_route_list_type route_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_list =
{
  1,
  route_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_list_array
};
static icb_pair_type route_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_list_array[1] =
{
  {
    &master_qxm_camnoc_hf1_uncomp,
    &slave_qns_camnoc_uncomp
  },
};
static icb_route_list_type route_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_list =
{
  1,
  route_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_list_array
};
static icb_pair_type route_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_list_array[1] =
{
  {
    &master_qxm_camnoc_sf_uncomp,
    &slave_qns_camnoc_uncomp
  },
};
static icb_route_list_type route_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_list =
{
  1,
  route_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_list_array
};
static icb_pair_type route_qxm_crypto_ebi_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_crypto_ebi_list =
{
  4,
  route_qxm_crypto_ebi_list_array
};
static icb_pair_type route_qxm_crypto_qhs_apss_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qxm_crypto_qhs_apss_list =
{
  4,
  route_qxm_crypto_qhs_apss_list_array
};
static icb_pair_type route_qxm_crypto_qns_llcc_list_array[3] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_crypto_qns_llcc_list =
{
  3,
  route_qxm_crypto_qns_llcc_list_array
};
static icb_pair_type route_qxm_crypto_qxs_imem_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qxm_crypto_qxs_imem_list =
{
  4,
  route_qxm_crypto_qxs_imem_list_array
};
static icb_pair_type route_qxm_crypto_qxs_pimem_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qxm_crypto_qxs_pimem_list =
{
  4,
  route_qxm_crypto_qxs_pimem_list_array
};
static icb_pair_type route_qxm_crypto_xs_pcie_0_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qxm_crypto_xs_pcie_0_list =
{
  4,
  route_qxm_crypto_xs_pcie_0_list_array
};
static icb_pair_type route_qxm_crypto_xs_pcie_1_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qxm_crypto_xs_pcie_1_list =
{
  4,
  route_qxm_crypto_xs_pcie_1_list_array
};
static icb_pair_type route_qxm_crypto_xs_pcie_modem_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qxm_crypto_xs_pcie_modem_list =
{
  4,
  route_qxm_crypto_xs_pcie_modem_list_array
};
static icb_pair_type route_qxm_crypto_xs_qdss_stm_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qxm_crypto_xs_qdss_stm_list =
{
  4,
  route_qxm_crypto_xs_qdss_stm_list_array
};
static icb_pair_type route_qxm_crypto_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qxm_crypto,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qxm_crypto_xs_sys_tcu_cfg_list =
{
  4,
  route_qxm_crypto_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qxm_ipa_ebi_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_ipa_ebi_list =
{
  4,
  route_qxm_ipa_ebi_list_array
};
static icb_pair_type route_qxm_ipa_qhs_apss_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qxm_ipa_qhs_apss_list =
{
  4,
  route_qxm_ipa_qhs_apss_list_array
};
static icb_pair_type route_qxm_ipa_qns_llcc_list_array[3] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_ipa_qns_llcc_list =
{
  3,
  route_qxm_ipa_qns_llcc_list_array
};
static icb_pair_type route_qxm_ipa_qxs_imem_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qxm_ipa_qxs_imem_list =
{
  4,
  route_qxm_ipa_qxs_imem_list_array
};
static icb_pair_type route_qxm_ipa_qxs_pimem_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qxm_ipa_qxs_pimem_list =
{
  4,
  route_qxm_ipa_qxs_pimem_list_array
};
static icb_pair_type route_qxm_ipa_xs_pcie_0_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_qxm_ipa_xs_pcie_0_list =
{
  4,
  route_qxm_ipa_xs_pcie_0_list_array
};
static icb_pair_type route_qxm_ipa_xs_pcie_1_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_qxm_ipa_xs_pcie_1_list =
{
  4,
  route_qxm_ipa_xs_pcie_1_list_array
};
static icb_pair_type route_qxm_ipa_xs_pcie_modem_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_qxm_ipa_xs_pcie_modem_list =
{
  4,
  route_qxm_ipa_xs_pcie_modem_list_array
};
static icb_pair_type route_qxm_ipa_xs_qdss_stm_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qxm_ipa_xs_qdss_stm_list =
{
  4,
  route_qxm_ipa_xs_qdss_stm_list_array
};
static icb_pair_type route_qxm_ipa_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_qxm_ipa,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qxm_ipa_xs_sys_tcu_cfg_list =
{
  4,
  route_qxm_ipa_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_qxm_mdp0_ebi_list_array[3] =
{
  {
    &master_qxm_mdp0,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_mdp0_ebi_list =
{
  3,
  route_qxm_mdp0_ebi_list_array
};
static icb_pair_type route_qxm_mdp0_qns_llcc_list_array[2] =
{
  {
    &master_qxm_mdp0,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_mdp0_qns_llcc_list =
{
  2,
  route_qxm_mdp0_qns_llcc_list_array
};
static icb_pair_type route_qxm_mdp1_ebi_list_array[3] =
{
  {
    &master_qxm_mdp1,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_mdp1_ebi_list =
{
  3,
  route_qxm_mdp1_ebi_list_array
};
static icb_pair_type route_qxm_mdp1_qns_llcc_list_array[2] =
{
  {
    &master_qxm_mdp1,
    &slave_qns_mem_noc_hf
  },
  {
    &master_qnm_mnoc_hf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_mdp1_qns_llcc_list =
{
  2,
  route_qxm_mdp1_qns_llcc_list_array
};
static icb_pair_type route_qxm_pimem_ebi_list_array[3] =
{
  {
    &master_qxm_pimem,
    &slave_qns_gemnoc_gc
  },
  {
    &master_qnm_snoc_gc,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_pimem_ebi_list =
{
  3,
  route_qxm_pimem_ebi_list_array
};
static icb_pair_type route_qxm_pimem_qns_llcc_list_array[2] =
{
  {
    &master_qxm_pimem,
    &slave_qns_gemnoc_gc
  },
  {
    &master_qnm_snoc_gc,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_pimem_qns_llcc_list =
{
  2,
  route_qxm_pimem_qns_llcc_list_array
};
static icb_pair_type route_qxm_rot_ebi_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_qxm_rot_ebi_list =
{
  3,
  route_qxm_rot_ebi_list_array
};
static icb_pair_type route_qxm_rot_qhs_apss_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_qxm_rot_qhs_apss_list =
{
  3,
  route_qxm_rot_qhs_apss_list_array
};
static icb_pair_type route_qxm_rot_qns_llcc_list_array[2] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_qxm_rot_qns_llcc_list =
{
  2,
  route_qxm_rot_qns_llcc_list_array
};
static icb_pair_type route_qxm_rot_qxs_imem_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_qxm_rot_qxs_imem_list =
{
  3,
  route_qxm_rot_qxs_imem_list_array
};
static icb_pair_type route_qxm_rot_qxs_pimem_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_qxm_rot_qxs_pimem_list =
{
  3,
  route_qxm_rot_qxs_pimem_list_array
};
static icb_pair_type route_qxm_rot_xs_qdss_stm_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_qxm_rot_xs_qdss_stm_list =
{
  3,
  route_qxm_rot_xs_qdss_stm_list_array
};
static icb_pair_type route_qxm_rot_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_qxm_rot,
    &slave_qns_mem_noc_sf
  },
  {
    &master_qnm_mnoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_qxm_rot_xs_sys_tcu_cfg_list =
{
  3,
  route_qxm_rot_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_gic_ebi_list_array[3] =
{
  {
    &master_xm_gic,
    &slave_qns_gemnoc_gc
  },
  {
    &master_qnm_snoc_gc,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_gic_ebi_list =
{
  3,
  route_xm_gic_ebi_list_array
};
static icb_pair_type route_xm_gic_qns_llcc_list_array[2] =
{
  {
    &master_xm_gic,
    &slave_qns_gemnoc_gc
  },
  {
    &master_qnm_snoc_gc,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_gic_qns_llcc_list =
{
  2,
  route_xm_gic_qns_llcc_list_array
};
static icb_pair_type route_xm_pcie3_0_ebi_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_pcie3_0_ebi_list =
{
  3,
  route_xm_pcie3_0_ebi_list_array
};
static icb_pair_type route_xm_pcie3_0_qhs_apss_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_pcie3_0_qhs_apss_list =
{
  3,
  route_xm_pcie3_0_qhs_apss_list_array
};
static icb_pair_type route_xm_pcie3_0_qns_llcc_list_array[2] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_pcie3_0_qns_llcc_list =
{
  2,
  route_xm_pcie3_0_qns_llcc_list_array
};
static icb_pair_type route_xm_pcie3_0_qxs_imem_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_pcie3_0_qxs_imem_list =
{
  3,
  route_xm_pcie3_0_qxs_imem_list_array
};
static icb_pair_type route_xm_pcie3_0_qxs_pimem_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_pcie3_0_qxs_pimem_list =
{
  3,
  route_xm_pcie3_0_qxs_pimem_list_array
};
static icb_pair_type route_xm_pcie3_0_xs_qdss_stm_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_pcie3_0_xs_qdss_stm_list =
{
  3,
  route_xm_pcie3_0_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_pcie3_0_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_xm_pcie3_0,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_pcie3_0_xs_sys_tcu_cfg_list =
{
  3,
  route_xm_pcie3_0_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_pcie3_1_ebi_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_pcie3_1_ebi_list =
{
  3,
  route_xm_pcie3_1_ebi_list_array
};
static icb_pair_type route_xm_pcie3_1_qhs_apss_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_pcie3_1_qhs_apss_list =
{
  3,
  route_xm_pcie3_1_qhs_apss_list_array
};
static icb_pair_type route_xm_pcie3_1_qns_llcc_list_array[2] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_pcie3_1_qns_llcc_list =
{
  2,
  route_xm_pcie3_1_qns_llcc_list_array
};
static icb_pair_type route_xm_pcie3_1_qxs_imem_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_pcie3_1_qxs_imem_list =
{
  3,
  route_xm_pcie3_1_qxs_imem_list_array
};
static icb_pair_type route_xm_pcie3_1_qxs_pimem_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_pcie3_1_qxs_pimem_list =
{
  3,
  route_xm_pcie3_1_qxs_pimem_list_array
};
static icb_pair_type route_xm_pcie3_1_xs_qdss_stm_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_pcie3_1_xs_qdss_stm_list =
{
  3,
  route_xm_pcie3_1_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_pcie3_1_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_xm_pcie3_1,
    &slave_qns_pcie_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_pcie3_1_xs_sys_tcu_cfg_list =
{
  3,
  route_xm_pcie3_1_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_pcie3_modem_ebi_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_pcie3_modem_ebi_list =
{
  3,
  route_xm_pcie3_modem_ebi_list_array
};
static icb_pair_type route_xm_pcie3_modem_qhs_apss_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_pcie3_modem_qhs_apss_list =
{
  3,
  route_xm_pcie3_modem_qhs_apss_list_array
};
static icb_pair_type route_xm_pcie3_modem_qns_llcc_list_array[2] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_pcie3_modem_qns_llcc_list =
{
  2,
  route_xm_pcie3_modem_qns_llcc_list_array
};
static icb_pair_type route_xm_pcie3_modem_qxs_imem_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_pcie3_modem_qxs_imem_list =
{
  3,
  route_xm_pcie3_modem_qxs_imem_list_array
};
static icb_pair_type route_xm_pcie3_modem_qxs_pimem_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_pcie3_modem_qxs_pimem_list =
{
  3,
  route_xm_pcie3_modem_qxs_pimem_list_array
};
static icb_pair_type route_xm_pcie3_modem_xs_qdss_stm_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_pcie3_modem_xs_qdss_stm_list =
{
  3,
  route_xm_pcie3_modem_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_pcie3_modem_xs_sys_tcu_cfg_list_array[3] =
{
  {
    &master_xm_pcie3_modem,
    &slave_qns_pcie_modem_mem_noc
  },
  {
    &master_qnm_pcie,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_pcie3_modem_xs_sys_tcu_cfg_list =
{
  3,
  route_xm_pcie3_modem_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_ebi_list_array[5] =
{
  {
    &master_xm_qdss_dap,
    &slave_qns_cnoc_a2noc
  },
  {
    &master_qnm_cnoc,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_qdss_dap_ebi_list =
{
  5,
  route_xm_qdss_dap_ebi_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ahb2phy0_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ahb2phy0
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ahb2phy0_list =
{
  1,
  route_xm_qdss_dap_qhs_ahb2phy0_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ahb2phy1_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ahb2phy1
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ahb2phy1_list =
{
  1,
  route_xm_qdss_dap_qhs_ahb2phy1_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_aoss_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_aoss
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_aoss_list =
{
  1,
  route_xm_qdss_dap_qhs_aoss_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cal_dp0_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp0
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cal_dp0_list =
{
  2,
  route_xm_qdss_dap_qhs_cal_dp0_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cal_dp1_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cal_dp1
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cal_dp1_list =
{
  2,
  route_xm_qdss_dap_qhs_cal_dp1_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_camera_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_camera_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_camera_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_camera_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_clk_ctl_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_clk_ctl
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_clk_ctl_list =
{
  1,
  route_xm_qdss_dap_qhs_clk_ctl_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_compute_dsp_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_compute_dsp
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_compute_dsp_list =
{
  1,
  route_xm_qdss_dap_qhs_compute_dsp_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cp_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_cp
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cp_list =
{
  2,
  route_xm_qdss_dap_qhs_cp_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cpr_cx_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_cpr_cx
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cpr_cx_list =
{
  1,
  route_xm_qdss_dap_qhs_cpr_cx_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cpr_mmcx_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_cpr_mmcx
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cpr_mmcx_list =
{
  1,
  route_xm_qdss_dap_qhs_cpr_mmcx_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cpr_mx_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_cpr_mx
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cpr_mx_list =
{
  1,
  route_xm_qdss_dap_qhs_cpr_mx_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_crypto0_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_crypto0_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_crypto0_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_crypto0_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_cx_rdpm_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_cx_rdpm
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_cx_rdpm_list =
{
  1,
  route_xm_qdss_dap_qhs_cx_rdpm_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_dcc_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_dcc_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_dcc_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_dcc_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_display_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_display_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_display_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_display_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_dma_bwmon_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dma_bwmon
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_dma_bwmon_list =
{
  2,
  route_xm_qdss_dap_qhs_dma_bwmon_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_dpm_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_dpm
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_dpm_list =
{
  2,
  route_xm_qdss_dap_qhs_dpm_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_gpuss_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_gpuss_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_gpuss_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_gpuss_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_imem_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_imem_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_imem_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_imem_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ipa_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ipa
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ipa_list =
{
  1,
  route_xm_qdss_dap_qhs_ipa_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ipc_router_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ipc_router
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ipc_router_list =
{
  1,
  route_xm_qdss_dap_qhs_ipc_router_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_isense_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_isense
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_isense_list =
{
  2,
  route_xm_qdss_dap_qhs_isense_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_llcc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_llcc
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_llcc_list =
{
  2,
  route_xm_qdss_dap_qhs_llcc_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_llm_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_llm
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_llm_list =
{
  2,
  route_xm_qdss_dap_qhs_llm_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_lpass_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_lpass_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_lpass_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_lpass_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_pcie0_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_pcie0_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_pcie0_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_pcie0_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_pcie1_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_pcie1_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_pcie1_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_pcie1_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_pcie_modem_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_pcie_modem_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_pcie_modem_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_pcie_modem_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_pdm_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_pdm
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_pdm_list =
{
  1,
  route_xm_qdss_dap_qhs_pdm_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_pimem_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_pimem_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_pimem_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_pimem_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_prng_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_prng
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_prng_list =
{
  1,
  route_xm_qdss_dap_qhs_prng_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_qdss_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_qdss_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_qdss_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_qdss_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_qspi_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_qspi
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_qspi_list =
{
  1,
  route_xm_qdss_dap_qhs_qspi_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_qup0_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_qup0
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_qup0_list =
{
  1,
  route_xm_qdss_dap_qhs_qup0_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_qup1_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_qup1
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_qup1_list =
{
  1,
  route_xm_qdss_dap_qhs_qup1_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_qup2_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_qup2
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_qup2_list =
{
  1,
  route_xm_qdss_dap_qhs_qup2_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_sdc2_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_sdc2
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_sdc2_list =
{
  1,
  route_xm_qdss_dap_qhs_sdc2_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_sdc4_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_sdc4
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_sdc4_list =
{
  1,
  route_xm_qdss_dap_qhs_sdc4_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tcm_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_qhs_tcm
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tcm_list =
{
  2,
  route_xm_qdss_dap_qhs_tcm_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tcsr_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_tcsr
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tcsr_list =
{
  1,
  route_xm_qdss_dap_qhs_tcsr_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tlmm0_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_tlmm0
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tlmm0_list =
{
  1,
  route_xm_qdss_dap_qhs_tlmm0_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tlmm1_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_tlmm1
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tlmm1_list =
{
  1,
  route_xm_qdss_dap_qhs_tlmm1_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tlmm2_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_tlmm2
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tlmm2_list =
{
  1,
  route_xm_qdss_dap_qhs_tlmm2_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_tsif_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_tsif
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_tsif_list =
{
  1,
  route_xm_qdss_dap_qhs_tsif_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ufs_card_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ufs_card_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ufs_card_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_ufs_card_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_ufs_mem_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ufs_mem_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_ufs_mem_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_ufs_mem_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_usb3_0_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_usb3_0
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_usb3_0_list =
{
  1,
  route_xm_qdss_dap_qhs_usb3_0_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_usb3_1_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_usb3_1
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_usb3_1_list =
{
  1,
  route_xm_qdss_dap_qhs_usb3_1_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_venus_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_venus_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_venus_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_venus_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qhs_vsense_ctrl_cfg_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_vsense_ctrl_cfg
  },
};
static icb_route_list_type route_xm_qdss_dap_qhs_vsense_ctrl_cfg_list =
{
  1,
  route_xm_qdss_dap_qhs_vsense_ctrl_cfg_list_array
};
static icb_pair_type route_xm_qdss_dap_qns_llcc_list_array[4] =
{
  {
    &master_xm_qdss_dap,
    &slave_qns_cnoc_a2noc
  },
  {
    &master_qnm_cnoc,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_qdss_dap_qns_llcc_list =
{
  4,
  route_xm_qdss_dap_qns_llcc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_aggre1_noc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_a1_noc_cfg
  },
  {
    &master_qhm_a1noc_cfg,
    &slave_srvc_aggre1_noc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_aggre1_noc_list =
{
  2,
  route_xm_qdss_dap_srvc_aggre1_noc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_aggre2_noc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_a2_noc_cfg
  },
  {
    &master_qhm_a2noc_cfg,
    &slave_srvc_aggre2_noc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_aggre2_noc_list =
{
  2,
  route_xm_qdss_dap_srvc_aggre2_noc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_cnoc_list_array[1] =
{
  {
    &master_xm_qdss_dap,
    &slave_srvc_cnoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_cnoc_list =
{
  1,
  route_xm_qdss_dap_srvc_cnoc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_even_gemnoc_list_array[3] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_even_gemnoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_even_gemnoc_list =
{
  3,
  route_xm_qdss_dap_srvc_even_gemnoc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_mnoc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_mnoc_cfg
  },
  {
    &master_qhm_mnoc_cfg,
    &slave_srvc_mnoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_mnoc_list =
{
  2,
  route_xm_qdss_dap_srvc_mnoc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_noc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_npu_cfg
  },
  {
    &master_qhm_cfg,
    &slave_srvc_noc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_noc_list =
{
  2,
  route_xm_qdss_dap_srvc_noc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_odd_gemnoc_list_array[3] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_odd_gemnoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_odd_gemnoc_list =
{
  3,
  route_xm_qdss_dap_srvc_odd_gemnoc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_snoc_list_array[2] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_snoc_cfg
  },
  {
    &master_qhm_snoc_cfg,
    &slave_srvc_snoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_snoc_list =
{
  2,
  route_xm_qdss_dap_srvc_snoc_list_array
};
static icb_pair_type route_xm_qdss_dap_srvc_sys_gemnoc_list_array[3] =
{
  {
    &master_xm_qdss_dap,
    &slave_qhs_ddrss_cfg
  },
  {
    &master_qhm_cnoc_dc_noc,
    &slave_qhs_memnoc
  },
  {
    &master_qhm_gemnoc_cfg,
    &slave_srvc_sys_gemnoc
  },
};
static icb_route_list_type route_xm_qdss_dap_srvc_sys_gemnoc_list =
{
  3,
  route_xm_qdss_dap_srvc_sys_gemnoc_list_array
};
static icb_pair_type route_xm_qdss_dap_xs_pcie_0_list_array[5] =
{
  {
    &master_xm_qdss_dap,
    &slave_qns_cnoc_a2noc
  },
  {
    &master_qnm_cnoc,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_qdss_dap_xs_pcie_0_list =
{
  5,
  route_xm_qdss_dap_xs_pcie_0_list_array
};
static icb_pair_type route_xm_qdss_dap_xs_pcie_1_list_array[5] =
{
  {
    &master_xm_qdss_dap,
    &slave_qns_cnoc_a2noc
  },
  {
    &master_qnm_cnoc,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_qdss_dap_xs_pcie_1_list =
{
  5,
  route_xm_qdss_dap_xs_pcie_1_list_array
};
static icb_pair_type route_xm_qdss_dap_xs_pcie_modem_list_array[5] =
{
  {
    &master_xm_qdss_dap,
    &slave_qns_cnoc_a2noc
  },
  {
    &master_qnm_cnoc,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_qdss_dap_xs_pcie_modem_list =
{
  5,
  route_xm_qdss_dap_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_qdss_etr_ebi_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_qdss_etr_ebi_list =
{
  4,
  route_xm_qdss_etr_ebi_list_array
};
static icb_pair_type route_xm_qdss_etr_qhs_apss_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_qdss_etr_qhs_apss_list =
{
  4,
  route_xm_qdss_etr_qhs_apss_list_array
};
static icb_pair_type route_xm_qdss_etr_qns_llcc_list_array[3] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_qdss_etr_qns_llcc_list =
{
  3,
  route_xm_qdss_etr_qns_llcc_list_array
};
static icb_pair_type route_xm_qdss_etr_qxs_imem_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_qdss_etr_qxs_imem_list =
{
  4,
  route_xm_qdss_etr_qxs_imem_list_array
};
static icb_pair_type route_xm_qdss_etr_qxs_pimem_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_qdss_etr_qxs_pimem_list =
{
  4,
  route_xm_qdss_etr_qxs_pimem_list_array
};
static icb_pair_type route_xm_qdss_etr_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_qdss_etr_xs_pcie_0_list =
{
  4,
  route_xm_qdss_etr_xs_pcie_0_list_array
};
static icb_pair_type route_xm_qdss_etr_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_qdss_etr_xs_pcie_1_list =
{
  4,
  route_xm_qdss_etr_xs_pcie_1_list_array
};
static icb_pair_type route_xm_qdss_etr_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_qdss_etr_xs_pcie_modem_list =
{
  4,
  route_xm_qdss_etr_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_qdss_etr_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_qdss_etr_xs_qdss_stm_list =
{
  4,
  route_xm_qdss_etr_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_qdss_etr_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_qdss_etr,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_qdss_etr_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_qdss_etr_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_sdc2_ebi_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_sdc2_ebi_list =
{
  4,
  route_xm_sdc2_ebi_list_array
};
static icb_pair_type route_xm_sdc2_qhs_apss_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_sdc2_qhs_apss_list =
{
  4,
  route_xm_sdc2_qhs_apss_list_array
};
static icb_pair_type route_xm_sdc2_qns_llcc_list_array[3] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_sdc2_qns_llcc_list =
{
  3,
  route_xm_sdc2_qns_llcc_list_array
};
static icb_pair_type route_xm_sdc2_qxs_imem_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_sdc2_qxs_imem_list =
{
  4,
  route_xm_sdc2_qxs_imem_list_array
};
static icb_pair_type route_xm_sdc2_qxs_pimem_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_sdc2_qxs_pimem_list =
{
  4,
  route_xm_sdc2_qxs_pimem_list_array
};
static icb_pair_type route_xm_sdc2_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_sdc2_xs_pcie_0_list =
{
  4,
  route_xm_sdc2_xs_pcie_0_list_array
};
static icb_pair_type route_xm_sdc2_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_sdc2_xs_pcie_1_list =
{
  4,
  route_xm_sdc2_xs_pcie_1_list_array
};
static icb_pair_type route_xm_sdc2_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_sdc2_xs_pcie_modem_list =
{
  4,
  route_xm_sdc2_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_sdc2_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_sdc2_xs_qdss_stm_list =
{
  4,
  route_xm_sdc2_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_sdc2_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_sdc2,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_sdc2_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_sdc2_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_sdc4_ebi_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_sdc4_ebi_list =
{
  4,
  route_xm_sdc4_ebi_list_array
};
static icb_pair_type route_xm_sdc4_qhs_apss_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_sdc4_qhs_apss_list =
{
  4,
  route_xm_sdc4_qhs_apss_list_array
};
static icb_pair_type route_xm_sdc4_qns_llcc_list_array[3] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_sdc4_qns_llcc_list =
{
  3,
  route_xm_sdc4_qns_llcc_list_array
};
static icb_pair_type route_xm_sdc4_qxs_imem_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_sdc4_qxs_imem_list =
{
  4,
  route_xm_sdc4_qxs_imem_list_array
};
static icb_pair_type route_xm_sdc4_qxs_pimem_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_sdc4_qxs_pimem_list =
{
  4,
  route_xm_sdc4_qxs_pimem_list_array
};
static icb_pair_type route_xm_sdc4_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_sdc4_xs_pcie_0_list =
{
  4,
  route_xm_sdc4_xs_pcie_0_list_array
};
static icb_pair_type route_xm_sdc4_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_sdc4_xs_pcie_1_list =
{
  4,
  route_xm_sdc4_xs_pcie_1_list_array
};
static icb_pair_type route_xm_sdc4_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_sdc4_xs_pcie_modem_list =
{
  4,
  route_xm_sdc4_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_sdc4_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_sdc4_xs_qdss_stm_list =
{
  4,
  route_xm_sdc4_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_sdc4_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_sdc4,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_sdc4_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_sdc4_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_ufs_card_ebi_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_ufs_card_ebi_list =
{
  4,
  route_xm_ufs_card_ebi_list_array
};
static icb_pair_type route_xm_ufs_card_qhs_apss_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_ufs_card_qhs_apss_list =
{
  4,
  route_xm_ufs_card_qhs_apss_list_array
};
static icb_pair_type route_xm_ufs_card_qns_llcc_list_array[3] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_ufs_card_qns_llcc_list =
{
  3,
  route_xm_ufs_card_qns_llcc_list_array
};
static icb_pair_type route_xm_ufs_card_qxs_imem_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_ufs_card_qxs_imem_list =
{
  4,
  route_xm_ufs_card_qxs_imem_list_array
};
static icb_pair_type route_xm_ufs_card_qxs_pimem_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_ufs_card_qxs_pimem_list =
{
  4,
  route_xm_ufs_card_qxs_pimem_list_array
};
static icb_pair_type route_xm_ufs_card_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_ufs_card_xs_pcie_0_list =
{
  4,
  route_xm_ufs_card_xs_pcie_0_list_array
};
static icb_pair_type route_xm_ufs_card_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_ufs_card_xs_pcie_1_list =
{
  4,
  route_xm_ufs_card_xs_pcie_1_list_array
};
static icb_pair_type route_xm_ufs_card_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_ufs_card_xs_pcie_modem_list =
{
  4,
  route_xm_ufs_card_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_ufs_card_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_ufs_card_xs_qdss_stm_list =
{
  4,
  route_xm_ufs_card_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_ufs_card_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_ufs_card,
    &slave_qns_a2noc_snoc
  },
  {
    &master_qnm_aggre2_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_ufs_card_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_ufs_card_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_ufs_mem_ebi_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_ufs_mem_ebi_list =
{
  4,
  route_xm_ufs_mem_ebi_list_array
};
static icb_pair_type route_xm_ufs_mem_qhs_apss_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_ufs_mem_qhs_apss_list =
{
  4,
  route_xm_ufs_mem_qhs_apss_list_array
};
static icb_pair_type route_xm_ufs_mem_qns_llcc_list_array[3] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_ufs_mem_qns_llcc_list =
{
  3,
  route_xm_ufs_mem_qns_llcc_list_array
};
static icb_pair_type route_xm_ufs_mem_qxs_imem_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_ufs_mem_qxs_imem_list =
{
  4,
  route_xm_ufs_mem_qxs_imem_list_array
};
static icb_pair_type route_xm_ufs_mem_qxs_pimem_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_ufs_mem_qxs_pimem_list =
{
  4,
  route_xm_ufs_mem_qxs_pimem_list_array
};
static icb_pair_type route_xm_ufs_mem_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_ufs_mem_xs_pcie_0_list =
{
  4,
  route_xm_ufs_mem_xs_pcie_0_list_array
};
static icb_pair_type route_xm_ufs_mem_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_ufs_mem_xs_pcie_1_list =
{
  4,
  route_xm_ufs_mem_xs_pcie_1_list_array
};
static icb_pair_type route_xm_ufs_mem_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_ufs_mem_xs_pcie_modem_list =
{
  4,
  route_xm_ufs_mem_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_ufs_mem_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_ufs_mem_xs_qdss_stm_list =
{
  4,
  route_xm_ufs_mem_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_ufs_mem_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_ufs_mem,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_ufs_mem_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_ufs_mem_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_usb3_0_ebi_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_usb3_0_ebi_list =
{
  4,
  route_xm_usb3_0_ebi_list_array
};
static icb_pair_type route_xm_usb3_0_qhs_apss_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_usb3_0_qhs_apss_list =
{
  4,
  route_xm_usb3_0_qhs_apss_list_array
};
static icb_pair_type route_xm_usb3_0_qns_llcc_list_array[3] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_usb3_0_qns_llcc_list =
{
  3,
  route_xm_usb3_0_qns_llcc_list_array
};
static icb_pair_type route_xm_usb3_0_qxs_imem_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_usb3_0_qxs_imem_list =
{
  4,
  route_xm_usb3_0_qxs_imem_list_array
};
static icb_pair_type route_xm_usb3_0_qxs_pimem_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_usb3_0_qxs_pimem_list =
{
  4,
  route_xm_usb3_0_qxs_pimem_list_array
};
static icb_pair_type route_xm_usb3_0_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_usb3_0_xs_pcie_0_list =
{
  4,
  route_xm_usb3_0_xs_pcie_0_list_array
};
static icb_pair_type route_xm_usb3_0_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_usb3_0_xs_pcie_1_list =
{
  4,
  route_xm_usb3_0_xs_pcie_1_list_array
};
static icb_pair_type route_xm_usb3_0_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_usb3_0_xs_pcie_modem_list =
{
  4,
  route_xm_usb3_0_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_usb3_0_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_usb3_0_xs_qdss_stm_list =
{
  4,
  route_xm_usb3_0_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_usb3_0_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_usb3_0,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_usb3_0_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_usb3_0_xs_sys_tcu_cfg_list_array
};
static icb_pair_type route_xm_usb3_1_ebi_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
  {
    &master_llcc_mc,
    &slave_ebi
  },
};
static icb_route_list_type route_xm_usb3_1_ebi_list =
{
  4,
  route_xm_usb3_1_ebi_list_array
};
static icb_pair_type route_xm_usb3_1_qhs_apss_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qhs_apss
  },
};
static icb_route_list_type route_xm_usb3_1_qhs_apss_list =
{
  4,
  route_xm_usb3_1_qhs_apss_list_array
};
static icb_pair_type route_xm_usb3_1_qns_llcc_list_array[3] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_llcc
  },
};
static icb_route_list_type route_xm_usb3_1_qns_llcc_list =
{
  3,
  route_xm_usb3_1_qns_llcc_list_array
};
static icb_pair_type route_xm_usb3_1_qxs_imem_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_imem
  },
};
static icb_route_list_type route_xm_usb3_1_qxs_imem_list =
{
  4,
  route_xm_usb3_1_qxs_imem_list_array
};
static icb_pair_type route_xm_usb3_1_qxs_pimem_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_qxs_pimem
  },
};
static icb_route_list_type route_xm_usb3_1_qxs_pimem_list =
{
  4,
  route_xm_usb3_1_qxs_pimem_list_array
};
static icb_pair_type route_xm_usb3_1_xs_pcie_0_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_0
  },
};
static icb_route_list_type route_xm_usb3_1_xs_pcie_0_list =
{
  4,
  route_xm_usb3_1_xs_pcie_0_list_array
};
static icb_pair_type route_xm_usb3_1_xs_pcie_1_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_1
  },
};
static icb_route_list_type route_xm_usb3_1_xs_pcie_1_list =
{
  4,
  route_xm_usb3_1_xs_pcie_1_list_array
};
static icb_pair_type route_xm_usb3_1_xs_pcie_modem_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_sys_pcie
  },
  {
    &master_qnm_gemnoc_pcie,
    &slave_xs_pcie_modem
  },
};
static icb_route_list_type route_xm_usb3_1_xs_pcie_modem_list =
{
  4,
  route_xm_usb3_1_xs_pcie_modem_list_array
};
static icb_pair_type route_xm_usb3_1_xs_qdss_stm_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_qdss_stm
  },
};
static icb_route_list_type route_xm_usb3_1_xs_qdss_stm_list =
{
  4,
  route_xm_usb3_1_xs_qdss_stm_list_array
};
static icb_pair_type route_xm_usb3_1_xs_sys_tcu_cfg_list_array[4] =
{
  {
    &master_xm_usb3_1,
    &slave_qns_a1noc_snoc
  },
  {
    &master_qnm_aggre1_noc,
    &slave_qns_gemnoc_sf
  },
  {
    &master_qnm_snoc_sf,
    &slave_qns_gem_noc_snoc
  },
  {
    &master_qnm_gemnoc,
    &slave_xs_sys_tcu_cfg
  },
};
static icb_route_list_type route_xm_usb3_1_xs_sys_tcu_cfg_list =
{
  4,
  route_xm_usb3_1_xs_sys_tcu_cfg_list_array
};

/*============================================================================
                         ROUTE TREE - 632 routes
============================================================================*/
/* Forward declarations */
static ul_treeNodeType route_0x0L_chm_apps_ebi_node;
static ul_treeNodeType route_0x3L_chm_apps_qhs_camera_cfg_node;
static ul_treeNodeType route_0x4L_chm_apps_qhs_display_cfg_node;
static ul_treeNodeType route_0xaL_chm_apps_qhs_venus_cfg_node;
static ul_treeNodeType route_0xbL_chm_apps_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0x11L_chm_apps_srvc_mnoc_node;
static ul_treeNodeType route_0x14L_chm_apps_qhs_apss_node;
static ul_treeNodeType route_0x15L_chm_apps_qhs_lpass_cfg_node;
static ul_treeNodeType route_0x16L_chm_apps_qhs_usb3_0_node;
static ul_treeNodeType route_0x1aL_chm_apps_qxs_imem_node;
static ul_treeNodeType route_0x1dL_chm_apps_srvc_snoc_node;
static ul_treeNodeType route_0x1eL_chm_apps_xs_qdss_stm_node;
static ul_treeNodeType route_0x21L_chm_apps_qhs_sdc2_node;
static ul_treeNodeType route_0x22L_chm_apps_qhs_sdc4_node;
static ul_treeNodeType route_0x23L_chm_apps_qhs_tsif_node;
static ul_treeNodeType route_0x25L_chm_apps_qhs_qup2_node;
static ul_treeNodeType route_0x27L_chm_apps_qhs_qup1_node;
static ul_treeNodeType route_0x29L_chm_apps_qhs_pdm_node;
static ul_treeNodeType route_0x2cL_chm_apps_qhs_prng_node;
static ul_treeNodeType route_0x2fL_chm_apps_qhs_clk_ctl_node;
static ul_treeNodeType route_0x32L_chm_apps_qhs_tcsr_node;
static ul_treeNodeType route_0x34L_chm_apps_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0x36L_chm_apps_qhs_imem_cfg_node;
static ul_treeNodeType route_0x3fL_chm_apps_qhs_qdss_cfg_node;
static ul_treeNodeType route_0x40L_chm_apps_qhs_cpr_cx_node;
static ul_treeNodeType route_0x4cL_chm_apps_srvc_cnoc_node;
static ul_treeNodeType route_0x53L_chm_apps_qhs_usb3_1_node;
static ul_treeNodeType route_0x54L_chm_apps_xs_pcie_0_node;
static ul_treeNodeType route_0x55L_chm_apps_xs_pcie_1_node;
static ul_treeNodeType route_0x58L_chm_apps_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0x59L_chm_apps_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0x5cL_chm_apps_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0x60L_chm_apps_qhs_cpr_mx_node;
static ul_treeNodeType route_0x85L_chm_apps_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x9bL_chm_apps_qhs_dcc_cfg_node;
static ul_treeNodeType route_0xa4L_chm_apps_xs_pcie_modem_node;
static ul_treeNodeType route_0xa5L_chm_apps_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0xa6L_chm_apps_qxs_pimem_node;
static ul_treeNodeType route_0xa7L_chm_apps_qhs_pimem_cfg_node;
static ul_treeNodeType route_0xb7L_chm_apps_qhs_ipa_node;
static ul_treeNodeType route_0xbeL_chm_apps_qhs_qspi_node;
static ul_treeNodeType route_0xd6L_chm_apps_qhs_tlmm0_node;
static ul_treeNodeType route_0xd7L_chm_apps_qhs_tlmm2_node;
static ul_treeNodeType route_0xd8L_chm_apps_qhs_tlmm1_node;
static ul_treeNodeType route_0xdbL_chm_apps_qhs_aoss_node;
static ul_treeNodeType route_0xdcL_chm_apps_qhs_compute_dsp_node;
static ul_treeNodeType route_0xe0L_chm_apps_qhs_llcc_node;
static ul_treeNodeType route_0xecL_chm_apps_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0xedL_chm_apps_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0xf3L_chm_apps_qns_llcc_node;
static ul_treeNodeType route_0xfcL_chm_apps_srvc_aggre1_noc_node;
static ul_treeNodeType route_0xfdL_chm_apps_srvc_aggre2_noc_node;
static ul_treeNodeType route_0x102L_chm_apps_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0x11cL_chm_apps_qhs_ahb2phy0_node;
static ul_treeNodeType route_0x11eL_chm_apps_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0x125L_chm_apps_qhs_qup0_node;
static ul_treeNodeType route_0x127L_chm_apps_srvc_even_gemnoc_node;
static ul_treeNodeType route_0x13aL_chm_apps_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0x140L_chm_apps_qhs_ahb2phy1_node;
static ul_treeNodeType route_0x142L_chm_apps_qhs_cx_rdpm_node;
static ul_treeNodeType route_0x143L_chm_apps_qhs_ipc_router_node;
static ul_treeNodeType route_0x144L_chm_apps_qhs_isense_node;
static ul_treeNodeType route_0x145L_chm_apps_qhs_cal_dp0_node;
static ul_treeNodeType route_0x146L_chm_apps_qhs_cal_dp1_node;
static ul_treeNodeType route_0x148L_chm_apps_qhs_cp_node;
static ul_treeNodeType route_0x149L_chm_apps_qhs_dpm_node;
static ul_treeNodeType route_0x14aL_chm_apps_qhs_dma_bwmon_node;
static ul_treeNodeType route_0x14bL_chm_apps_qhs_llm_node;
static ul_treeNodeType route_0x14cL_chm_apps_qhs_tcm_node;
static ul_treeNodeType route_0x14dL_chm_apps_srvc_noc_node;
static ul_treeNodeType route_0x600000000L_qnm_gpu_ebi_node;
static ul_treeNodeType route_0x600000003L_qnm_gpu_qhs_camera_cfg_node;
static ul_treeNodeType route_0x600000004L_qnm_gpu_qhs_display_cfg_node;
static ul_treeNodeType route_0x60000000aL_qnm_gpu_qhs_venus_cfg_node;
static ul_treeNodeType route_0x60000000bL_qnm_gpu_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0x600000011L_qnm_gpu_srvc_mnoc_node;
static ul_treeNodeType route_0x600000014L_qnm_gpu_qhs_apss_node;
static ul_treeNodeType route_0x600000015L_qnm_gpu_qhs_lpass_cfg_node;
static ul_treeNodeType route_0x600000016L_qnm_gpu_qhs_usb3_0_node;
static ul_treeNodeType route_0x60000001aL_qnm_gpu_qxs_imem_node;
static ul_treeNodeType route_0x60000001dL_qnm_gpu_srvc_snoc_node;
static ul_treeNodeType route_0x60000001eL_qnm_gpu_xs_qdss_stm_node;
static ul_treeNodeType route_0x600000021L_qnm_gpu_qhs_sdc2_node;
static ul_treeNodeType route_0x600000022L_qnm_gpu_qhs_sdc4_node;
static ul_treeNodeType route_0x600000023L_qnm_gpu_qhs_tsif_node;
static ul_treeNodeType route_0x600000025L_qnm_gpu_qhs_qup2_node;
static ul_treeNodeType route_0x600000027L_qnm_gpu_qhs_qup1_node;
static ul_treeNodeType route_0x600000029L_qnm_gpu_qhs_pdm_node;
static ul_treeNodeType route_0x60000002cL_qnm_gpu_qhs_prng_node;
static ul_treeNodeType route_0x60000002fL_qnm_gpu_qhs_clk_ctl_node;
static ul_treeNodeType route_0x600000032L_qnm_gpu_qhs_tcsr_node;
static ul_treeNodeType route_0x600000034L_qnm_gpu_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0x600000036L_qnm_gpu_qhs_imem_cfg_node;
static ul_treeNodeType route_0x60000003fL_qnm_gpu_qhs_qdss_cfg_node;
static ul_treeNodeType route_0x600000040L_qnm_gpu_qhs_cpr_cx_node;
static ul_treeNodeType route_0x60000004cL_qnm_gpu_srvc_cnoc_node;
static ul_treeNodeType route_0x600000053L_qnm_gpu_qhs_usb3_1_node;
static ul_treeNodeType route_0x600000058L_qnm_gpu_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0x600000059L_qnm_gpu_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0x60000005cL_qnm_gpu_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0x600000060L_qnm_gpu_qhs_cpr_mx_node;
static ul_treeNodeType route_0x600000085L_qnm_gpu_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x60000009bL_qnm_gpu_qhs_dcc_cfg_node;
static ul_treeNodeType route_0x6000000a5L_qnm_gpu_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0x6000000a6L_qnm_gpu_qxs_pimem_node;
static ul_treeNodeType route_0x6000000a7L_qnm_gpu_qhs_pimem_cfg_node;
static ul_treeNodeType route_0x6000000b7L_qnm_gpu_qhs_ipa_node;
static ul_treeNodeType route_0x6000000beL_qnm_gpu_qhs_qspi_node;
static ul_treeNodeType route_0x6000000d6L_qnm_gpu_qhs_tlmm0_node;
static ul_treeNodeType route_0x6000000d7L_qnm_gpu_qhs_tlmm2_node;
static ul_treeNodeType route_0x6000000d8L_qnm_gpu_qhs_tlmm1_node;
static ul_treeNodeType route_0x6000000dbL_qnm_gpu_qhs_aoss_node;
static ul_treeNodeType route_0x6000000dcL_qnm_gpu_qhs_compute_dsp_node;
static ul_treeNodeType route_0x6000000e0L_qnm_gpu_qhs_llcc_node;
static ul_treeNodeType route_0x6000000ecL_qnm_gpu_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0x6000000edL_qnm_gpu_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0x6000000f3L_qnm_gpu_qns_llcc_node;
static ul_treeNodeType route_0x6000000fcL_qnm_gpu_srvc_aggre1_noc_node;
static ul_treeNodeType route_0x6000000fdL_qnm_gpu_srvc_aggre2_noc_node;
static ul_treeNodeType route_0x600000102L_qnm_gpu_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0x60000011cL_qnm_gpu_qhs_ahb2phy0_node;
static ul_treeNodeType route_0x60000011eL_qnm_gpu_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0x600000125L_qnm_gpu_qhs_qup0_node;
static ul_treeNodeType route_0x600000127L_qnm_gpu_srvc_even_gemnoc_node;
static ul_treeNodeType route_0x60000013aL_qnm_gpu_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0x600000140L_qnm_gpu_qhs_ahb2phy1_node;
static ul_treeNodeType route_0x600000142L_qnm_gpu_qhs_cx_rdpm_node;
static ul_treeNodeType route_0x600000143L_qnm_gpu_qhs_ipc_router_node;
static ul_treeNodeType route_0x600000144L_qnm_gpu_qhs_isense_node;
static ul_treeNodeType route_0x600000145L_qnm_gpu_qhs_cal_dp0_node;
static ul_treeNodeType route_0x600000146L_qnm_gpu_qhs_cal_dp1_node;
static ul_treeNodeType route_0x600000148L_qnm_gpu_qhs_cp_node;
static ul_treeNodeType route_0x600000149L_qnm_gpu_qhs_dpm_node;
static ul_treeNodeType route_0x60000014aL_qnm_gpu_qhs_dma_bwmon_node;
static ul_treeNodeType route_0x60000014bL_qnm_gpu_qhs_llm_node;
static ul_treeNodeType route_0x60000014cL_qnm_gpu_qhs_tcm_node;
static ul_treeNodeType route_0x60000014dL_qnm_gpu_srvc_noc_node;
static ul_treeNodeType route_0x800000000L_qxm_mdp0_ebi_node;
static ul_treeNodeType route_0x8000000f3L_qxm_mdp0_qns_llcc_node;
static ul_treeNodeType route_0x900000000L_qnm_video0_ebi_node;
static ul_treeNodeType route_0x900000014L_qnm_video0_qhs_apss_node;
static ul_treeNodeType route_0x90000001aL_qnm_video0_qxs_imem_node;
static ul_treeNodeType route_0x90000001eL_qnm_video0_xs_qdss_stm_node;
static ul_treeNodeType route_0x900000085L_qnm_video0_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x9000000a6L_qnm_video0_qxs_pimem_node;
static ul_treeNodeType route_0x9000000f3L_qnm_video0_qns_llcc_node;
static ul_treeNodeType route_0xa00000000L_qnm_video1_ebi_node;
static ul_treeNodeType route_0xa00000014L_qnm_video1_qhs_apss_node;
static ul_treeNodeType route_0xa0000001aL_qnm_video1_qxs_imem_node;
static ul_treeNodeType route_0xa0000001eL_qnm_video1_xs_qdss_stm_node;
static ul_treeNodeType route_0xa00000085L_qnm_video1_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xa000000a6L_qnm_video1_qxs_pimem_node;
static ul_treeNodeType route_0xa000000f3L_qnm_video1_qns_llcc_node;
static ul_treeNodeType route_0x1300000000L_qhm_qdss_bam_ebi_node;
static ul_treeNodeType route_0x1300000014L_qhm_qdss_bam_qhs_apss_node;
static ul_treeNodeType route_0x130000001aL_qhm_qdss_bam_qxs_imem_node;
static ul_treeNodeType route_0x130000001eL_qhm_qdss_bam_xs_qdss_stm_node;
static ul_treeNodeType route_0x1300000054L_qhm_qdss_bam_xs_pcie_0_node;
static ul_treeNodeType route_0x1300000055L_qhm_qdss_bam_xs_pcie_1_node;
static ul_treeNodeType route_0x1300000085L_qhm_qdss_bam_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x13000000a4L_qhm_qdss_bam_xs_pcie_modem_node;
static ul_treeNodeType route_0x13000000a6L_qhm_qdss_bam_qxs_pimem_node;
static ul_treeNodeType route_0x13000000f3L_qhm_qdss_bam_qns_llcc_node;
static ul_treeNodeType route_0x1700000000L_qxm_crypto_ebi_node;
static ul_treeNodeType route_0x1700000014L_qxm_crypto_qhs_apss_node;
static ul_treeNodeType route_0x170000001aL_qxm_crypto_qxs_imem_node;
static ul_treeNodeType route_0x170000001eL_qxm_crypto_xs_qdss_stm_node;
static ul_treeNodeType route_0x1700000054L_qxm_crypto_xs_pcie_0_node;
static ul_treeNodeType route_0x1700000055L_qxm_crypto_xs_pcie_1_node;
static ul_treeNodeType route_0x1700000085L_qxm_crypto_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x17000000a4L_qxm_crypto_xs_pcie_modem_node;
static ul_treeNodeType route_0x17000000a6L_qxm_crypto_qxs_pimem_node;
static ul_treeNodeType route_0x17000000f3L_qxm_crypto_qns_llcc_node;
static ul_treeNodeType route_0x1f00000000L_xm_qdss_etr_ebi_node;
static ul_treeNodeType route_0x1f00000014L_xm_qdss_etr_qhs_apss_node;
static ul_treeNodeType route_0x1f0000001aL_xm_qdss_etr_qxs_imem_node;
static ul_treeNodeType route_0x1f0000001eL_xm_qdss_etr_xs_qdss_stm_node;
static ul_treeNodeType route_0x1f00000054L_xm_qdss_etr_xs_pcie_0_node;
static ul_treeNodeType route_0x1f00000055L_xm_qdss_etr_xs_pcie_1_node;
static ul_treeNodeType route_0x1f00000085L_xm_qdss_etr_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x1f000000a4L_xm_qdss_etr_xs_pcie_modem_node;
static ul_treeNodeType route_0x1f000000a6L_xm_qdss_etr_qxs_pimem_node;
static ul_treeNodeType route_0x1f000000f3L_xm_qdss_etr_qns_llcc_node;
static ul_treeNodeType route_0x2000000000L_xm_usb3_0_ebi_node;
static ul_treeNodeType route_0x2000000014L_xm_usb3_0_qhs_apss_node;
static ul_treeNodeType route_0x200000001aL_xm_usb3_0_qxs_imem_node;
static ul_treeNodeType route_0x200000001eL_xm_usb3_0_xs_qdss_stm_node;
static ul_treeNodeType route_0x2000000054L_xm_usb3_0_xs_pcie_0_node;
static ul_treeNodeType route_0x2000000055L_xm_usb3_0_xs_pcie_1_node;
static ul_treeNodeType route_0x2000000085L_xm_usb3_0_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x20000000a4L_xm_usb3_0_xs_pcie_modem_node;
static ul_treeNodeType route_0x20000000a6L_xm_usb3_0_qxs_pimem_node;
static ul_treeNodeType route_0x20000000f3L_xm_usb3_0_qns_llcc_node;
static ul_treeNodeType route_0x2300000000L_xm_sdc2_ebi_node;
static ul_treeNodeType route_0x2300000014L_xm_sdc2_qhs_apss_node;
static ul_treeNodeType route_0x230000001aL_xm_sdc2_qxs_imem_node;
static ul_treeNodeType route_0x230000001eL_xm_sdc2_xs_qdss_stm_node;
static ul_treeNodeType route_0x2300000054L_xm_sdc2_xs_pcie_0_node;
static ul_treeNodeType route_0x2300000055L_xm_sdc2_xs_pcie_1_node;
static ul_treeNodeType route_0x2300000085L_xm_sdc2_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x23000000a4L_xm_sdc2_xs_pcie_modem_node;
static ul_treeNodeType route_0x23000000a6L_xm_sdc2_qxs_pimem_node;
static ul_treeNodeType route_0x23000000f3L_xm_sdc2_qns_llcc_node;
static ul_treeNodeType route_0x2400000000L_xm_sdc4_ebi_node;
static ul_treeNodeType route_0x2400000014L_xm_sdc4_qhs_apss_node;
static ul_treeNodeType route_0x240000001aL_xm_sdc4_qxs_imem_node;
static ul_treeNodeType route_0x240000001eL_xm_sdc4_xs_qdss_stm_node;
static ul_treeNodeType route_0x2400000054L_xm_sdc4_xs_pcie_0_node;
static ul_treeNodeType route_0x2400000055L_xm_sdc4_xs_pcie_1_node;
static ul_treeNodeType route_0x2400000085L_xm_sdc4_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x24000000a4L_xm_sdc4_xs_pcie_modem_node;
static ul_treeNodeType route_0x24000000a6L_xm_sdc4_qxs_pimem_node;
static ul_treeNodeType route_0x24000000f3L_xm_sdc4_qns_llcc_node;
static ul_treeNodeType route_0x2500000000L_qhm_tsif_ebi_node;
static ul_treeNodeType route_0x2500000014L_qhm_tsif_qhs_apss_node;
static ul_treeNodeType route_0x250000001aL_qhm_tsif_qxs_imem_node;
static ul_treeNodeType route_0x250000001eL_qhm_tsif_xs_qdss_stm_node;
static ul_treeNodeType route_0x2500000054L_qhm_tsif_xs_pcie_0_node;
static ul_treeNodeType route_0x2500000055L_qhm_tsif_xs_pcie_1_node;
static ul_treeNodeType route_0x2500000085L_qhm_tsif_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x25000000a4L_qhm_tsif_xs_pcie_modem_node;
static ul_treeNodeType route_0x25000000a6L_qhm_tsif_qxs_pimem_node;
static ul_treeNodeType route_0x25000000f3L_qhm_tsif_qns_llcc_node;
static ul_treeNodeType route_0x2700000000L_qhm_qup2_ebi_node;
static ul_treeNodeType route_0x2700000014L_qhm_qup2_qhs_apss_node;
static ul_treeNodeType route_0x270000001aL_qhm_qup2_qxs_imem_node;
static ul_treeNodeType route_0x270000001eL_qhm_qup2_xs_qdss_stm_node;
static ul_treeNodeType route_0x2700000054L_qhm_qup2_xs_pcie_0_node;
static ul_treeNodeType route_0x2700000055L_qhm_qup2_xs_pcie_1_node;
static ul_treeNodeType route_0x2700000085L_qhm_qup2_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x27000000a4L_qhm_qup2_xs_pcie_modem_node;
static ul_treeNodeType route_0x27000000a6L_qhm_qup2_qxs_pimem_node;
static ul_treeNodeType route_0x27000000f3L_qhm_qup2_qns_llcc_node;
static ul_treeNodeType route_0x2900000000L_qhm_qup1_ebi_node;
static ul_treeNodeType route_0x2900000014L_qhm_qup1_qhs_apss_node;
static ul_treeNodeType route_0x290000001aL_qhm_qup1_qxs_imem_node;
static ul_treeNodeType route_0x290000001eL_qhm_qup1_xs_qdss_stm_node;
static ul_treeNodeType route_0x2900000054L_qhm_qup1_xs_pcie_0_node;
static ul_treeNodeType route_0x2900000055L_qhm_qup1_xs_pcie_1_node;
static ul_treeNodeType route_0x2900000085L_qhm_qup1_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x29000000a4L_qhm_qup1_xs_pcie_modem_node;
static ul_treeNodeType route_0x29000000a6L_qhm_qup1_qxs_pimem_node;
static ul_treeNodeType route_0x29000000f3L_qhm_qup1_qns_llcc_node;
static ul_treeNodeType route_0x3100000000L_xm_qdss_dap_ebi_node;
static ul_treeNodeType route_0x3100000003L_xm_qdss_dap_qhs_camera_cfg_node;
static ul_treeNodeType route_0x3100000004L_xm_qdss_dap_qhs_display_cfg_node;
static ul_treeNodeType route_0x310000000aL_xm_qdss_dap_qhs_venus_cfg_node;
static ul_treeNodeType route_0x310000000bL_xm_qdss_dap_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0x3100000011L_xm_qdss_dap_srvc_mnoc_node;
static ul_treeNodeType route_0x3100000015L_xm_qdss_dap_qhs_lpass_cfg_node;
static ul_treeNodeType route_0x3100000016L_xm_qdss_dap_qhs_usb3_0_node;
static ul_treeNodeType route_0x310000001dL_xm_qdss_dap_srvc_snoc_node;
static ul_treeNodeType route_0x3100000021L_xm_qdss_dap_qhs_sdc2_node;
static ul_treeNodeType route_0x3100000022L_xm_qdss_dap_qhs_sdc4_node;
static ul_treeNodeType route_0x3100000023L_xm_qdss_dap_qhs_tsif_node;
static ul_treeNodeType route_0x3100000025L_xm_qdss_dap_qhs_qup2_node;
static ul_treeNodeType route_0x3100000027L_xm_qdss_dap_qhs_qup1_node;
static ul_treeNodeType route_0x3100000029L_xm_qdss_dap_qhs_pdm_node;
static ul_treeNodeType route_0x310000002cL_xm_qdss_dap_qhs_prng_node;
static ul_treeNodeType route_0x310000002fL_xm_qdss_dap_qhs_clk_ctl_node;
static ul_treeNodeType route_0x3100000032L_xm_qdss_dap_qhs_tcsr_node;
static ul_treeNodeType route_0x3100000034L_xm_qdss_dap_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0x3100000036L_xm_qdss_dap_qhs_imem_cfg_node;
static ul_treeNodeType route_0x310000003fL_xm_qdss_dap_qhs_qdss_cfg_node;
static ul_treeNodeType route_0x3100000040L_xm_qdss_dap_qhs_cpr_cx_node;
static ul_treeNodeType route_0x310000004cL_xm_qdss_dap_srvc_cnoc_node;
static ul_treeNodeType route_0x3100000053L_xm_qdss_dap_qhs_usb3_1_node;
static ul_treeNodeType route_0x3100000054L_xm_qdss_dap_xs_pcie_0_node;
static ul_treeNodeType route_0x3100000055L_xm_qdss_dap_xs_pcie_1_node;
static ul_treeNodeType route_0x3100000058L_xm_qdss_dap_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0x3100000059L_xm_qdss_dap_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0x310000005cL_xm_qdss_dap_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0x3100000060L_xm_qdss_dap_qhs_cpr_mx_node;
static ul_treeNodeType route_0x310000009bL_xm_qdss_dap_qhs_dcc_cfg_node;
static ul_treeNodeType route_0x31000000a4L_xm_qdss_dap_xs_pcie_modem_node;
static ul_treeNodeType route_0x31000000a5L_xm_qdss_dap_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0x31000000a7L_xm_qdss_dap_qhs_pimem_cfg_node;
static ul_treeNodeType route_0x31000000b7L_xm_qdss_dap_qhs_ipa_node;
static ul_treeNodeType route_0x31000000beL_xm_qdss_dap_qhs_qspi_node;
static ul_treeNodeType route_0x31000000d6L_xm_qdss_dap_qhs_tlmm0_node;
static ul_treeNodeType route_0x31000000d7L_xm_qdss_dap_qhs_tlmm2_node;
static ul_treeNodeType route_0x31000000d8L_xm_qdss_dap_qhs_tlmm1_node;
static ul_treeNodeType route_0x31000000dbL_xm_qdss_dap_qhs_aoss_node;
static ul_treeNodeType route_0x31000000dcL_xm_qdss_dap_qhs_compute_dsp_node;
static ul_treeNodeType route_0x31000000e0L_xm_qdss_dap_qhs_llcc_node;
static ul_treeNodeType route_0x31000000ecL_xm_qdss_dap_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0x31000000edL_xm_qdss_dap_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0x31000000f3L_xm_qdss_dap_qns_llcc_node;
static ul_treeNodeType route_0x31000000fcL_xm_qdss_dap_srvc_aggre1_noc_node;
static ul_treeNodeType route_0x31000000fdL_xm_qdss_dap_srvc_aggre2_noc_node;
static ul_treeNodeType route_0x3100000102L_xm_qdss_dap_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0x310000011cL_xm_qdss_dap_qhs_ahb2phy0_node;
static ul_treeNodeType route_0x310000011eL_xm_qdss_dap_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0x3100000125L_xm_qdss_dap_qhs_qup0_node;
static ul_treeNodeType route_0x3100000127L_xm_qdss_dap_srvc_even_gemnoc_node;
static ul_treeNodeType route_0x310000013aL_xm_qdss_dap_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0x3100000140L_xm_qdss_dap_qhs_ahb2phy1_node;
static ul_treeNodeType route_0x3100000142L_xm_qdss_dap_qhs_cx_rdpm_node;
static ul_treeNodeType route_0x3100000143L_xm_qdss_dap_qhs_ipc_router_node;
static ul_treeNodeType route_0x3100000144L_xm_qdss_dap_qhs_isense_node;
static ul_treeNodeType route_0x3100000145L_xm_qdss_dap_qhs_cal_dp0_node;
static ul_treeNodeType route_0x3100000146L_xm_qdss_dap_qhs_cal_dp1_node;
static ul_treeNodeType route_0x3100000148L_xm_qdss_dap_qhs_cp_node;
static ul_treeNodeType route_0x3100000149L_xm_qdss_dap_qhs_dpm_node;
static ul_treeNodeType route_0x310000014aL_xm_qdss_dap_qhs_dma_bwmon_node;
static ul_treeNodeType route_0x310000014bL_xm_qdss_dap_qhs_llm_node;
static ul_treeNodeType route_0x310000014cL_xm_qdss_dap_qhs_tcm_node;
static ul_treeNodeType route_0x310000014dL_xm_qdss_dap_srvc_noc_node;
static ul_treeNodeType route_0x3b00000000L_qxm_ipa_ebi_node;
static ul_treeNodeType route_0x3b00000014L_qxm_ipa_qhs_apss_node;
static ul_treeNodeType route_0x3b0000001aL_qxm_ipa_qxs_imem_node;
static ul_treeNodeType route_0x3b0000001eL_qxm_ipa_xs_qdss_stm_node;
static ul_treeNodeType route_0x3b00000054L_qxm_ipa_xs_pcie_0_node;
static ul_treeNodeType route_0x3b00000055L_qxm_ipa_xs_pcie_1_node;
static ul_treeNodeType route_0x3b00000085L_qxm_ipa_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x3b000000a4L_qxm_ipa_xs_pcie_modem_node;
static ul_treeNodeType route_0x3b000000a6L_qxm_ipa_qxs_pimem_node;
static ul_treeNodeType route_0x3b000000f3L_qxm_ipa_qns_llcc_node;
static ul_treeNodeType route_0x3d00000000L_qxm_mdp1_ebi_node;
static ul_treeNodeType route_0x3d000000f3L_qxm_mdp1_qns_llcc_node;
static ul_treeNodeType route_0x4100000000L_xm_pcie3_0_ebi_node;
static ul_treeNodeType route_0x4100000014L_xm_pcie3_0_qhs_apss_node;
static ul_treeNodeType route_0x410000001aL_xm_pcie3_0_qxs_imem_node;
static ul_treeNodeType route_0x410000001eL_xm_pcie3_0_xs_qdss_stm_node;
static ul_treeNodeType route_0x4100000085L_xm_pcie3_0_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x41000000a6L_xm_pcie3_0_qxs_pimem_node;
static ul_treeNodeType route_0x41000000f3L_xm_pcie3_0_qns_llcc_node;
static ul_treeNodeType route_0x4200000000L_xm_pcie3_1_ebi_node;
static ul_treeNodeType route_0x4200000014L_xm_pcie3_1_qhs_apss_node;
static ul_treeNodeType route_0x420000001aL_xm_pcie3_1_qxs_imem_node;
static ul_treeNodeType route_0x420000001eL_xm_pcie3_1_xs_qdss_stm_node;
static ul_treeNodeType route_0x4200000085L_xm_pcie3_1_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x42000000a6L_xm_pcie3_1_qxs_pimem_node;
static ul_treeNodeType route_0x42000000f3L_xm_pcie3_1_qns_llcc_node;
static ul_treeNodeType route_0x4400000000L_xm_ufs_card_ebi_node;
static ul_treeNodeType route_0x4400000014L_xm_ufs_card_qhs_apss_node;
static ul_treeNodeType route_0x440000001aL_xm_ufs_card_qxs_imem_node;
static ul_treeNodeType route_0x440000001eL_xm_ufs_card_xs_qdss_stm_node;
static ul_treeNodeType route_0x4400000054L_xm_ufs_card_xs_pcie_0_node;
static ul_treeNodeType route_0x4400000055L_xm_ufs_card_xs_pcie_1_node;
static ul_treeNodeType route_0x4400000085L_xm_ufs_card_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x44000000a4L_xm_ufs_card_xs_pcie_modem_node;
static ul_treeNodeType route_0x44000000a6L_xm_ufs_card_qxs_pimem_node;
static ul_treeNodeType route_0x44000000f3L_xm_ufs_card_qns_llcc_node;
static ul_treeNodeType route_0x4500000000L_xm_usb3_1_ebi_node;
static ul_treeNodeType route_0x4500000014L_xm_usb3_1_qhs_apss_node;
static ul_treeNodeType route_0x450000001aL_xm_usb3_1_qxs_imem_node;
static ul_treeNodeType route_0x450000001eL_xm_usb3_1_xs_qdss_stm_node;
static ul_treeNodeType route_0x4500000054L_xm_usb3_1_xs_pcie_0_node;
static ul_treeNodeType route_0x4500000055L_xm_usb3_1_xs_pcie_1_node;
static ul_treeNodeType route_0x4500000085L_xm_usb3_1_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x45000000a4L_xm_usb3_1_xs_pcie_modem_node;
static ul_treeNodeType route_0x45000000a6L_xm_usb3_1_qxs_pimem_node;
static ul_treeNodeType route_0x45000000f3L_xm_usb3_1_qns_llcc_node;
static ul_treeNodeType route_0x7100000000L_qxm_pimem_ebi_node;
static ul_treeNodeType route_0x71000000f3L_qxm_pimem_qns_llcc_node;
static ul_treeNodeType route_0x7700000000L_xm_pcie3_modem_ebi_node;
static ul_treeNodeType route_0x7700000014L_xm_pcie3_modem_qhs_apss_node;
static ul_treeNodeType route_0x770000001aL_xm_pcie3_modem_qxs_imem_node;
static ul_treeNodeType route_0x770000001eL_xm_pcie3_modem_xs_qdss_stm_node;
static ul_treeNodeType route_0x7700000085L_xm_pcie3_modem_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x77000000a6L_xm_pcie3_modem_qxs_pimem_node;
static ul_treeNodeType route_0x77000000f3L_xm_pcie3_modem_qns_llcc_node;
static ul_treeNodeType route_0x7800000000L_qxm_rot_ebi_node;
static ul_treeNodeType route_0x7800000014L_qxm_rot_qhs_apss_node;
static ul_treeNodeType route_0x780000001aL_qxm_rot_qxs_imem_node;
static ul_treeNodeType route_0x780000001eL_qxm_rot_xs_qdss_stm_node;
static ul_treeNodeType route_0x7800000085L_qxm_rot_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x78000000a6L_qxm_rot_qxs_pimem_node;
static ul_treeNodeType route_0x78000000f3L_qxm_rot_qns_llcc_node;
static ul_treeNodeType route_0x8400000000L_qhm_qspi_ebi_node;
static ul_treeNodeType route_0x8400000014L_qhm_qspi_qhs_apss_node;
static ul_treeNodeType route_0x840000001aL_qhm_qspi_qxs_imem_node;
static ul_treeNodeType route_0x840000001eL_qhm_qspi_xs_qdss_stm_node;
static ul_treeNodeType route_0x8400000054L_qhm_qspi_xs_pcie_0_node;
static ul_treeNodeType route_0x8400000055L_qhm_qspi_xs_pcie_1_node;
static ul_treeNodeType route_0x8400000085L_qhm_qspi_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0x84000000a4L_qhm_qspi_xs_pcie_modem_node;
static ul_treeNodeType route_0x84000000a6L_qhm_qspi_qxs_pimem_node;
static ul_treeNodeType route_0x84000000f3L_qhm_qspi_qns_llcc_node;
static ul_treeNodeType route_0xab00000000L_qnm_camnoc_hf_ebi_node;
static ul_treeNodeType route_0xab000000f3L_qnm_camnoc_hf_qns_llcc_node;
static ul_treeNodeType route_0xac00000000L_qnm_camnoc_sf_ebi_node;
static ul_treeNodeType route_0xac00000014L_qnm_camnoc_sf_qhs_apss_node;
static ul_treeNodeType route_0xac0000001aL_qnm_camnoc_sf_qxs_imem_node;
static ul_treeNodeType route_0xac0000001eL_qnm_camnoc_sf_xs_qdss_stm_node;
static ul_treeNodeType route_0xac00000085L_qnm_camnoc_sf_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xac000000a6L_qnm_camnoc_sf_qxs_pimem_node;
static ul_treeNodeType route_0xac000000f3L_qnm_camnoc_sf_qns_llcc_node;
static ul_treeNodeType route_0xb100000000L_qnm_video_cvp_ebi_node;
static ul_treeNodeType route_0xb100000014L_qnm_video_cvp_qhs_apss_node;
static ul_treeNodeType route_0xb10000001aL_qnm_video_cvp_qxs_imem_node;
static ul_treeNodeType route_0xb10000001eL_qnm_video_cvp_xs_qdss_stm_node;
static ul_treeNodeType route_0xb100000085L_qnm_video_cvp_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xb1000000a6L_qnm_video_cvp_qxs_pimem_node;
static ul_treeNodeType route_0xb1000000f3L_qnm_video_cvp_qns_llcc_node;
static ul_treeNodeType route_0xb200000000L_xm_ufs_mem_ebi_node;
static ul_treeNodeType route_0xb200000014L_xm_ufs_mem_qhs_apss_node;
static ul_treeNodeType route_0xb20000001aL_xm_ufs_mem_qxs_imem_node;
static ul_treeNodeType route_0xb20000001eL_xm_ufs_mem_xs_qdss_stm_node;
static ul_treeNodeType route_0xb200000054L_xm_ufs_mem_xs_pcie_0_node;
static ul_treeNodeType route_0xb200000055L_xm_ufs_mem_xs_pcie_1_node;
static ul_treeNodeType route_0xb200000085L_xm_ufs_mem_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xb2000000a4L_xm_ufs_mem_xs_pcie_modem_node;
static ul_treeNodeType route_0xb2000000a6L_xm_ufs_mem_qxs_pimem_node;
static ul_treeNodeType route_0xb2000000f3L_xm_ufs_mem_qns_llcc_node;
static ul_treeNodeType route_0xb300000000L_xm_gic_ebi_node;
static ul_treeNodeType route_0xb3000000f3L_xm_gic_qns_llcc_node;
static ul_treeNodeType route_0xb400000000L_llcc_mc_ebi_node;
static ul_treeNodeType route_0xb900000109L_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_node;
static ul_treeNodeType route_0xba00000109L_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_node;
static ul_treeNodeType route_0xbb00000109L_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_node;
static ul_treeNodeType route_0xc200000000L_qhm_qup0_ebi_node;
static ul_treeNodeType route_0xc200000014L_qhm_qup0_qhs_apss_node;
static ul_treeNodeType route_0xc20000001aL_qhm_qup0_qxs_imem_node;
static ul_treeNodeType route_0xc20000001eL_qhm_qup0_xs_qdss_stm_node;
static ul_treeNodeType route_0xc200000054L_qhm_qup0_xs_pcie_0_node;
static ul_treeNodeType route_0xc200000055L_qhm_qup0_xs_pcie_1_node;
static ul_treeNodeType route_0xc200000085L_qhm_qup0_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xc2000000a4L_qhm_qup0_xs_pcie_modem_node;
static ul_treeNodeType route_0xc2000000a6L_qhm_qup0_qxs_pimem_node;
static ul_treeNodeType route_0xc2000000f3L_qhm_qup0_qns_llcc_node;
static ul_treeNodeType route_0xc300000000L_qnm_npu_ebi_node;
static ul_treeNodeType route_0xc300000003L_qnm_npu_qhs_camera_cfg_node;
static ul_treeNodeType route_0xc300000004L_qnm_npu_qhs_display_cfg_node;
static ul_treeNodeType route_0xc30000000aL_qnm_npu_qhs_venus_cfg_node;
static ul_treeNodeType route_0xc30000000bL_qnm_npu_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0xc300000011L_qnm_npu_srvc_mnoc_node;
static ul_treeNodeType route_0xc300000014L_qnm_npu_qhs_apss_node;
static ul_treeNodeType route_0xc300000015L_qnm_npu_qhs_lpass_cfg_node;
static ul_treeNodeType route_0xc300000016L_qnm_npu_qhs_usb3_0_node;
static ul_treeNodeType route_0xc30000001aL_qnm_npu_qxs_imem_node;
static ul_treeNodeType route_0xc30000001dL_qnm_npu_srvc_snoc_node;
static ul_treeNodeType route_0xc30000001eL_qnm_npu_xs_qdss_stm_node;
static ul_treeNodeType route_0xc300000021L_qnm_npu_qhs_sdc2_node;
static ul_treeNodeType route_0xc300000022L_qnm_npu_qhs_sdc4_node;
static ul_treeNodeType route_0xc300000023L_qnm_npu_qhs_tsif_node;
static ul_treeNodeType route_0xc300000025L_qnm_npu_qhs_qup2_node;
static ul_treeNodeType route_0xc300000027L_qnm_npu_qhs_qup1_node;
static ul_treeNodeType route_0xc300000029L_qnm_npu_qhs_pdm_node;
static ul_treeNodeType route_0xc30000002cL_qnm_npu_qhs_prng_node;
static ul_treeNodeType route_0xc30000002fL_qnm_npu_qhs_clk_ctl_node;
static ul_treeNodeType route_0xc300000032L_qnm_npu_qhs_tcsr_node;
static ul_treeNodeType route_0xc300000034L_qnm_npu_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0xc300000036L_qnm_npu_qhs_imem_cfg_node;
static ul_treeNodeType route_0xc30000003fL_qnm_npu_qhs_qdss_cfg_node;
static ul_treeNodeType route_0xc300000040L_qnm_npu_qhs_cpr_cx_node;
static ul_treeNodeType route_0xc30000004cL_qnm_npu_srvc_cnoc_node;
static ul_treeNodeType route_0xc300000053L_qnm_npu_qhs_usb3_1_node;
static ul_treeNodeType route_0xc300000058L_qnm_npu_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0xc300000059L_qnm_npu_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0xc30000005cL_qnm_npu_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0xc300000060L_qnm_npu_qhs_cpr_mx_node;
static ul_treeNodeType route_0xc300000085L_qnm_npu_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xc30000009bL_qnm_npu_qhs_dcc_cfg_node;
static ul_treeNodeType route_0xc3000000a5L_qnm_npu_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0xc3000000a6L_qnm_npu_qxs_pimem_node;
static ul_treeNodeType route_0xc3000000a7L_qnm_npu_qhs_pimem_cfg_node;
static ul_treeNodeType route_0xc3000000b7L_qnm_npu_qhs_ipa_node;
static ul_treeNodeType route_0xc3000000beL_qnm_npu_qhs_qspi_node;
static ul_treeNodeType route_0xc3000000d6L_qnm_npu_qhs_tlmm0_node;
static ul_treeNodeType route_0xc3000000d7L_qnm_npu_qhs_tlmm2_node;
static ul_treeNodeType route_0xc3000000d8L_qnm_npu_qhs_tlmm1_node;
static ul_treeNodeType route_0xc3000000dbL_qnm_npu_qhs_aoss_node;
static ul_treeNodeType route_0xc3000000dcL_qnm_npu_qhs_compute_dsp_node;
static ul_treeNodeType route_0xc3000000e0L_qnm_npu_qhs_llcc_node;
static ul_treeNodeType route_0xc3000000ecL_qnm_npu_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0xc3000000edL_qnm_npu_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0xc3000000f3L_qnm_npu_qns_llcc_node;
static ul_treeNodeType route_0xc3000000fcL_qnm_npu_srvc_aggre1_noc_node;
static ul_treeNodeType route_0xc3000000fdL_qnm_npu_srvc_aggre2_noc_node;
static ul_treeNodeType route_0xc300000102L_qnm_npu_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0xc30000011cL_qnm_npu_qhs_ahb2phy0_node;
static ul_treeNodeType route_0xc30000011eL_qnm_npu_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0xc300000125L_qnm_npu_qhs_qup0_node;
static ul_treeNodeType route_0xc300000127L_qnm_npu_srvc_even_gemnoc_node;
static ul_treeNodeType route_0xc30000013aL_qnm_npu_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0xc300000140L_qnm_npu_qhs_ahb2phy1_node;
static ul_treeNodeType route_0xc300000142L_qnm_npu_qhs_cx_rdpm_node;
static ul_treeNodeType route_0xc300000143L_qnm_npu_qhs_ipc_router_node;
static ul_treeNodeType route_0xc300000144L_qnm_npu_qhs_isense_node;
static ul_treeNodeType route_0xc300000145L_qnm_npu_qhs_cal_dp0_node;
static ul_treeNodeType route_0xc300000146L_qnm_npu_qhs_cal_dp1_node;
static ul_treeNodeType route_0xc300000148L_qnm_npu_qhs_cp_node;
static ul_treeNodeType route_0xc300000149L_qnm_npu_qhs_dpm_node;
static ul_treeNodeType route_0xc30000014aL_qnm_npu_qhs_dma_bwmon_node;
static ul_treeNodeType route_0xc30000014bL_qnm_npu_qhs_llm_node;
static ul_treeNodeType route_0xc30000014cL_qnm_npu_qhs_tcm_node;
static ul_treeNodeType route_0xc30000014dL_qnm_npu_srvc_noc_node;
static ul_treeNodeType route_0xc400000000L_alm_gpu_tcu_ebi_node;
static ul_treeNodeType route_0xc400000003L_alm_gpu_tcu_qhs_camera_cfg_node;
static ul_treeNodeType route_0xc400000004L_alm_gpu_tcu_qhs_display_cfg_node;
static ul_treeNodeType route_0xc40000000aL_alm_gpu_tcu_qhs_venus_cfg_node;
static ul_treeNodeType route_0xc40000000bL_alm_gpu_tcu_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0xc400000011L_alm_gpu_tcu_srvc_mnoc_node;
static ul_treeNodeType route_0xc400000014L_alm_gpu_tcu_qhs_apss_node;
static ul_treeNodeType route_0xc400000015L_alm_gpu_tcu_qhs_lpass_cfg_node;
static ul_treeNodeType route_0xc400000016L_alm_gpu_tcu_qhs_usb3_0_node;
static ul_treeNodeType route_0xc40000001aL_alm_gpu_tcu_qxs_imem_node;
static ul_treeNodeType route_0xc40000001dL_alm_gpu_tcu_srvc_snoc_node;
static ul_treeNodeType route_0xc40000001eL_alm_gpu_tcu_xs_qdss_stm_node;
static ul_treeNodeType route_0xc400000021L_alm_gpu_tcu_qhs_sdc2_node;
static ul_treeNodeType route_0xc400000022L_alm_gpu_tcu_qhs_sdc4_node;
static ul_treeNodeType route_0xc400000023L_alm_gpu_tcu_qhs_tsif_node;
static ul_treeNodeType route_0xc400000025L_alm_gpu_tcu_qhs_qup2_node;
static ul_treeNodeType route_0xc400000027L_alm_gpu_tcu_qhs_qup1_node;
static ul_treeNodeType route_0xc400000029L_alm_gpu_tcu_qhs_pdm_node;
static ul_treeNodeType route_0xc40000002cL_alm_gpu_tcu_qhs_prng_node;
static ul_treeNodeType route_0xc40000002fL_alm_gpu_tcu_qhs_clk_ctl_node;
static ul_treeNodeType route_0xc400000032L_alm_gpu_tcu_qhs_tcsr_node;
static ul_treeNodeType route_0xc400000034L_alm_gpu_tcu_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0xc400000036L_alm_gpu_tcu_qhs_imem_cfg_node;
static ul_treeNodeType route_0xc40000003fL_alm_gpu_tcu_qhs_qdss_cfg_node;
static ul_treeNodeType route_0xc400000040L_alm_gpu_tcu_qhs_cpr_cx_node;
static ul_treeNodeType route_0xc40000004cL_alm_gpu_tcu_srvc_cnoc_node;
static ul_treeNodeType route_0xc400000053L_alm_gpu_tcu_qhs_usb3_1_node;
static ul_treeNodeType route_0xc400000058L_alm_gpu_tcu_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0xc400000059L_alm_gpu_tcu_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0xc40000005cL_alm_gpu_tcu_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0xc400000060L_alm_gpu_tcu_qhs_cpr_mx_node;
static ul_treeNodeType route_0xc400000085L_alm_gpu_tcu_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xc40000009bL_alm_gpu_tcu_qhs_dcc_cfg_node;
static ul_treeNodeType route_0xc4000000a5L_alm_gpu_tcu_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0xc4000000a6L_alm_gpu_tcu_qxs_pimem_node;
static ul_treeNodeType route_0xc4000000a7L_alm_gpu_tcu_qhs_pimem_cfg_node;
static ul_treeNodeType route_0xc4000000b7L_alm_gpu_tcu_qhs_ipa_node;
static ul_treeNodeType route_0xc4000000beL_alm_gpu_tcu_qhs_qspi_node;
static ul_treeNodeType route_0xc4000000d6L_alm_gpu_tcu_qhs_tlmm0_node;
static ul_treeNodeType route_0xc4000000d7L_alm_gpu_tcu_qhs_tlmm2_node;
static ul_treeNodeType route_0xc4000000d8L_alm_gpu_tcu_qhs_tlmm1_node;
static ul_treeNodeType route_0xc4000000dbL_alm_gpu_tcu_qhs_aoss_node;
static ul_treeNodeType route_0xc4000000dcL_alm_gpu_tcu_qhs_compute_dsp_node;
static ul_treeNodeType route_0xc4000000e0L_alm_gpu_tcu_qhs_llcc_node;
static ul_treeNodeType route_0xc4000000ecL_alm_gpu_tcu_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0xc4000000edL_alm_gpu_tcu_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0xc4000000f3L_alm_gpu_tcu_qns_llcc_node;
static ul_treeNodeType route_0xc4000000fcL_alm_gpu_tcu_srvc_aggre1_noc_node;
static ul_treeNodeType route_0xc4000000fdL_alm_gpu_tcu_srvc_aggre2_noc_node;
static ul_treeNodeType route_0xc400000102L_alm_gpu_tcu_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0xc40000011cL_alm_gpu_tcu_qhs_ahb2phy0_node;
static ul_treeNodeType route_0xc40000011eL_alm_gpu_tcu_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0xc400000125L_alm_gpu_tcu_qhs_qup0_node;
static ul_treeNodeType route_0xc400000127L_alm_gpu_tcu_srvc_even_gemnoc_node;
static ul_treeNodeType route_0xc40000013aL_alm_gpu_tcu_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0xc400000140L_alm_gpu_tcu_qhs_ahb2phy1_node;
static ul_treeNodeType route_0xc400000142L_alm_gpu_tcu_qhs_cx_rdpm_node;
static ul_treeNodeType route_0xc400000143L_alm_gpu_tcu_qhs_ipc_router_node;
static ul_treeNodeType route_0xc400000144L_alm_gpu_tcu_qhs_isense_node;
static ul_treeNodeType route_0xc400000145L_alm_gpu_tcu_qhs_cal_dp0_node;
static ul_treeNodeType route_0xc400000146L_alm_gpu_tcu_qhs_cal_dp1_node;
static ul_treeNodeType route_0xc400000148L_alm_gpu_tcu_qhs_cp_node;
static ul_treeNodeType route_0xc400000149L_alm_gpu_tcu_qhs_dpm_node;
static ul_treeNodeType route_0xc40000014aL_alm_gpu_tcu_qhs_dma_bwmon_node;
static ul_treeNodeType route_0xc40000014bL_alm_gpu_tcu_qhs_llm_node;
static ul_treeNodeType route_0xc40000014cL_alm_gpu_tcu_qhs_tcm_node;
static ul_treeNodeType route_0xc40000014dL_alm_gpu_tcu_srvc_noc_node;
static ul_treeNodeType route_0xc500000000L_alm_sys_tcu_ebi_node;
static ul_treeNodeType route_0xc500000003L_alm_sys_tcu_qhs_camera_cfg_node;
static ul_treeNodeType route_0xc500000004L_alm_sys_tcu_qhs_display_cfg_node;
static ul_treeNodeType route_0xc50000000aL_alm_sys_tcu_qhs_venus_cfg_node;
static ul_treeNodeType route_0xc50000000bL_alm_sys_tcu_qhs_gpuss_cfg_node;
static ul_treeNodeType route_0xc500000011L_alm_sys_tcu_srvc_mnoc_node;
static ul_treeNodeType route_0xc500000014L_alm_sys_tcu_qhs_apss_node;
static ul_treeNodeType route_0xc500000015L_alm_sys_tcu_qhs_lpass_cfg_node;
static ul_treeNodeType route_0xc500000016L_alm_sys_tcu_qhs_usb3_0_node;
static ul_treeNodeType route_0xc50000001aL_alm_sys_tcu_qxs_imem_node;
static ul_treeNodeType route_0xc50000001dL_alm_sys_tcu_srvc_snoc_node;
static ul_treeNodeType route_0xc50000001eL_alm_sys_tcu_xs_qdss_stm_node;
static ul_treeNodeType route_0xc500000021L_alm_sys_tcu_qhs_sdc2_node;
static ul_treeNodeType route_0xc500000022L_alm_sys_tcu_qhs_sdc4_node;
static ul_treeNodeType route_0xc500000023L_alm_sys_tcu_qhs_tsif_node;
static ul_treeNodeType route_0xc500000025L_alm_sys_tcu_qhs_qup2_node;
static ul_treeNodeType route_0xc500000027L_alm_sys_tcu_qhs_qup1_node;
static ul_treeNodeType route_0xc500000029L_alm_sys_tcu_qhs_pdm_node;
static ul_treeNodeType route_0xc50000002cL_alm_sys_tcu_qhs_prng_node;
static ul_treeNodeType route_0xc50000002fL_alm_sys_tcu_qhs_clk_ctl_node;
static ul_treeNodeType route_0xc500000032L_alm_sys_tcu_qhs_tcsr_node;
static ul_treeNodeType route_0xc500000034L_alm_sys_tcu_qhs_crypto0_cfg_node;
static ul_treeNodeType route_0xc500000036L_alm_sys_tcu_qhs_imem_cfg_node;
static ul_treeNodeType route_0xc50000003fL_alm_sys_tcu_qhs_qdss_cfg_node;
static ul_treeNodeType route_0xc500000040L_alm_sys_tcu_qhs_cpr_cx_node;
static ul_treeNodeType route_0xc50000004cL_alm_sys_tcu_srvc_cnoc_node;
static ul_treeNodeType route_0xc500000053L_alm_sys_tcu_qhs_usb3_1_node;
static ul_treeNodeType route_0xc500000058L_alm_sys_tcu_qhs_pcie0_cfg_node;
static ul_treeNodeType route_0xc500000059L_alm_sys_tcu_qhs_pcie1_cfg_node;
static ul_treeNodeType route_0xc50000005cL_alm_sys_tcu_qhs_ufs_card_cfg_node;
static ul_treeNodeType route_0xc500000060L_alm_sys_tcu_qhs_cpr_mx_node;
static ul_treeNodeType route_0xc500000085L_alm_sys_tcu_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xc50000009bL_alm_sys_tcu_qhs_dcc_cfg_node;
static ul_treeNodeType route_0xc5000000a5L_alm_sys_tcu_qhs_pcie_modem_cfg_node;
static ul_treeNodeType route_0xc5000000a6L_alm_sys_tcu_qxs_pimem_node;
static ul_treeNodeType route_0xc5000000a7L_alm_sys_tcu_qhs_pimem_cfg_node;
static ul_treeNodeType route_0xc5000000b7L_alm_sys_tcu_qhs_ipa_node;
static ul_treeNodeType route_0xc5000000beL_alm_sys_tcu_qhs_qspi_node;
static ul_treeNodeType route_0xc5000000d6L_alm_sys_tcu_qhs_tlmm0_node;
static ul_treeNodeType route_0xc5000000d7L_alm_sys_tcu_qhs_tlmm2_node;
static ul_treeNodeType route_0xc5000000d8L_alm_sys_tcu_qhs_tlmm1_node;
static ul_treeNodeType route_0xc5000000dbL_alm_sys_tcu_qhs_aoss_node;
static ul_treeNodeType route_0xc5000000dcL_alm_sys_tcu_qhs_compute_dsp_node;
static ul_treeNodeType route_0xc5000000e0L_alm_sys_tcu_qhs_llcc_node;
static ul_treeNodeType route_0xc5000000ecL_alm_sys_tcu_qhs_ufs_mem_cfg_node;
static ul_treeNodeType route_0xc5000000edL_alm_sys_tcu_qhs_vsense_ctrl_cfg_node;
static ul_treeNodeType route_0xc5000000f3L_alm_sys_tcu_qns_llcc_node;
static ul_treeNodeType route_0xc5000000fcL_alm_sys_tcu_srvc_aggre1_noc_node;
static ul_treeNodeType route_0xc5000000fdL_alm_sys_tcu_srvc_aggre2_noc_node;
static ul_treeNodeType route_0xc500000102L_alm_sys_tcu_srvc_sys_gemnoc_node;
static ul_treeNodeType route_0xc50000011cL_alm_sys_tcu_qhs_ahb2phy0_node;
static ul_treeNodeType route_0xc50000011eL_alm_sys_tcu_qhs_cpr_mmcx_node;
static ul_treeNodeType route_0xc500000125L_alm_sys_tcu_qhs_qup0_node;
static ul_treeNodeType route_0xc500000127L_alm_sys_tcu_srvc_even_gemnoc_node;
static ul_treeNodeType route_0xc50000013aL_alm_sys_tcu_srvc_odd_gemnoc_node;
static ul_treeNodeType route_0xc500000140L_alm_sys_tcu_qhs_ahb2phy1_node;
static ul_treeNodeType route_0xc500000142L_alm_sys_tcu_qhs_cx_rdpm_node;
static ul_treeNodeType route_0xc500000143L_alm_sys_tcu_qhs_ipc_router_node;
static ul_treeNodeType route_0xc500000144L_alm_sys_tcu_qhs_isense_node;
static ul_treeNodeType route_0xc500000145L_alm_sys_tcu_qhs_cal_dp0_node;
static ul_treeNodeType route_0xc500000146L_alm_sys_tcu_qhs_cal_dp1_node;
static ul_treeNodeType route_0xc500000148L_alm_sys_tcu_qhs_cp_node;
static ul_treeNodeType route_0xc500000149L_alm_sys_tcu_qhs_dpm_node;
static ul_treeNodeType route_0xc50000014aL_alm_sys_tcu_qhs_dma_bwmon_node;
static ul_treeNodeType route_0xc50000014bL_alm_sys_tcu_qhs_llm_node;
static ul_treeNodeType route_0xc50000014cL_alm_sys_tcu_qhs_tcm_node;
static ul_treeNodeType route_0xc50000014dL_alm_sys_tcu_srvc_noc_node;
static ul_treeNodeType route_0xd700000000L_qnm_camnoc_icp_ebi_node;
static ul_treeNodeType route_0xd700000014L_qnm_camnoc_icp_qhs_apss_node;
static ul_treeNodeType route_0xd70000001aL_qnm_camnoc_icp_qxs_imem_node;
static ul_treeNodeType route_0xd70000001eL_qnm_camnoc_icp_xs_qdss_stm_node;
static ul_treeNodeType route_0xd700000085L_qnm_camnoc_icp_xs_sys_tcu_cfg_node;
static ul_treeNodeType route_0xd7000000a6L_qnm_camnoc_icp_qxs_pimem_node;
static ul_treeNodeType route_0xd7000000f3L_qnm_camnoc_icp_qns_llcc_node;
static ul_treeNodeType route_0xd800000147L_amm_npu_sys_cdp_w_qns_npu_sys_node;
static ul_treeNodeType route_0xda00000147L_amm_npu_sys_qns_npu_sys_node;

/* Create the tree */
static ul_treeNodeType route_0x0L_chm_apps_ebi_node =
{
  0x0ULL,                                 /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3L_chm_apps_qhs_camera_cfg_node =
{
  0x3ULL,                                 /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_camera_cfg_list,
  &route_0x0L_chm_apps_ebi_node,
  &route_0x4L_chm_apps_qhs_display_cfg_node
};
static ul_treeNodeType route_0x4L_chm_apps_qhs_display_cfg_node =
{
  0x4ULL,                                 /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_display_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xaL_chm_apps_qhs_venus_cfg_node =
{
  0xaULL,                                 /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_venus_cfg_list,
  &route_0x3L_chm_apps_qhs_camera_cfg_node,
  &route_0x11L_chm_apps_srvc_mnoc_node
};
static ul_treeNodeType route_0xbL_chm_apps_qhs_gpuss_cfg_node =
{
  0xbULL,                                 /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_gpuss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x11L_chm_apps_srvc_mnoc_node =
{
  0x11ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_mnoc_list,
  &route_0xbL_chm_apps_qhs_gpuss_cfg_node,
  &route_0x14L_chm_apps_qhs_apss_node
};
static ul_treeNodeType route_0x14L_chm_apps_qhs_apss_node =
{
  0x14ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x15L_chm_apps_qhs_lpass_cfg_node =
{
  0x15ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_lpass_cfg_list,
  &route_0xaL_chm_apps_qhs_venus_cfg_node,
  &route_0x1eL_chm_apps_xs_qdss_stm_node
};
static ul_treeNodeType route_0x16L_chm_apps_qhs_usb3_0_node =
{
  0x16ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_usb3_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1aL_chm_apps_qxs_imem_node =
{
  0x1aULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qxs_imem_list,
  &route_0x16L_chm_apps_qhs_usb3_0_node,
  &route_0x1dL_chm_apps_srvc_snoc_node
};
static ul_treeNodeType route_0x1dL_chm_apps_srvc_snoc_node =
{
  0x1dULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_snoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1eL_chm_apps_xs_qdss_stm_node =
{
  0x1eULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_xs_qdss_stm_list,
  &route_0x1aL_chm_apps_qxs_imem_node,
  &route_0x22L_chm_apps_qhs_sdc4_node
};
static ul_treeNodeType route_0x21L_chm_apps_qhs_sdc2_node =
{
  0x21ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_sdc2_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x22L_chm_apps_qhs_sdc4_node =
{
  0x22ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_sdc4_list,
  &route_0x21L_chm_apps_qhs_sdc2_node,
  &route_0x23L_chm_apps_qhs_tsif_node
};
static ul_treeNodeType route_0x23L_chm_apps_qhs_tsif_node =
{
  0x23ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tsif_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x25L_chm_apps_qhs_qup2_node =
{
  0x25ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_qup2_list,
  &route_0x15L_chm_apps_qhs_lpass_cfg_node,
  &route_0x34L_chm_apps_qhs_crypto0_cfg_node
};
static ul_treeNodeType route_0x27L_chm_apps_qhs_qup1_node =
{
  0x27ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_qup1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x29L_chm_apps_qhs_pdm_node =
{
  0x29ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_pdm_list,
  &route_0x27L_chm_apps_qhs_qup1_node,
  &route_0x2cL_chm_apps_qhs_prng_node
};
static ul_treeNodeType route_0x2cL_chm_apps_qhs_prng_node =
{
  0x2cULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_prng_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2fL_chm_apps_qhs_clk_ctl_node =
{
  0x2fULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_clk_ctl_list,
  &route_0x29L_chm_apps_qhs_pdm_node,
  &route_0x32L_chm_apps_qhs_tcsr_node
};
static ul_treeNodeType route_0x32L_chm_apps_qhs_tcsr_node =
{
  0x32ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tcsr_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x34L_chm_apps_qhs_crypto0_cfg_node =
{
  0x34ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_crypto0_cfg_list,
  &route_0x2fL_chm_apps_qhs_clk_ctl_node,
  &route_0x3fL_chm_apps_qhs_qdss_cfg_node
};
static ul_treeNodeType route_0x36L_chm_apps_qhs_imem_cfg_node =
{
  0x36ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_imem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3fL_chm_apps_qhs_qdss_cfg_node =
{
  0x3fULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_qdss_cfg_list,
  &route_0x36L_chm_apps_qhs_imem_cfg_node,
  &route_0x40L_chm_apps_qhs_cpr_cx_node
};
static ul_treeNodeType route_0x40L_chm_apps_qhs_cpr_cx_node =
{
  0x40ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cpr_cx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4cL_chm_apps_srvc_cnoc_node =
{
  0x4cULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_cnoc_list,
  &route_0x25L_chm_apps_qhs_qup2_node,
  &route_0xdcL_chm_apps_qhs_compute_dsp_node
};
static ul_treeNodeType route_0x53L_chm_apps_qhs_usb3_1_node =
{
  0x53ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_usb3_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x54L_chm_apps_xs_pcie_0_node =
{
  0x54ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_xs_pcie_0_list,
  &route_0x53L_chm_apps_qhs_usb3_1_node,
  &route_0x55L_chm_apps_xs_pcie_1_node
};
static ul_treeNodeType route_0x55L_chm_apps_xs_pcie_1_node =
{
  0x55ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x58L_chm_apps_qhs_pcie0_cfg_node =
{
  0x58ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_pcie0_cfg_list,
  &route_0x54L_chm_apps_xs_pcie_0_node,
  &route_0x60L_chm_apps_qhs_cpr_mx_node
};
static ul_treeNodeType route_0x59L_chm_apps_qhs_pcie1_cfg_node =
{
  0x59ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_pcie1_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x5cL_chm_apps_qhs_ufs_card_cfg_node =
{
  0x5cULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ufs_card_cfg_list,
  &route_0x59L_chm_apps_qhs_pcie1_cfg_node,
  NULL
};
static ul_treeNodeType route_0x60L_chm_apps_qhs_cpr_mx_node =
{
  0x60ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cpr_mx_list,
  &route_0x5cL_chm_apps_qhs_ufs_card_cfg_node,
  &route_0x85L_chm_apps_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x85L_chm_apps_xs_sys_tcu_cfg_node =
{
  0x85ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x9bL_chm_apps_qhs_dcc_cfg_node =
{
  0x9bULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_dcc_cfg_list,
  &route_0x58L_chm_apps_qhs_pcie0_cfg_node,
  &route_0xa7L_chm_apps_qhs_pimem_cfg_node
};
static ul_treeNodeType route_0xa4L_chm_apps_xs_pcie_modem_node =
{
  0xa4ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xa5L_chm_apps_qhs_pcie_modem_cfg_node =
{
  0xa5ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_pcie_modem_cfg_list,
  &route_0xa4L_chm_apps_xs_pcie_modem_node,
  &route_0xa6L_chm_apps_qxs_pimem_node
};
static ul_treeNodeType route_0xa6L_chm_apps_qxs_pimem_node =
{
  0xa6ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xa7L_chm_apps_qhs_pimem_cfg_node =
{
  0xa7ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_pimem_cfg_list,
  &route_0xa5L_chm_apps_qhs_pcie_modem_cfg_node,
  &route_0xd6L_chm_apps_qhs_tlmm0_node
};
static ul_treeNodeType route_0xb7L_chm_apps_qhs_ipa_node =
{
  0xb7ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ipa_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xbeL_chm_apps_qhs_qspi_node =
{
  0xbeULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_qspi_list,
  &route_0xb7L_chm_apps_qhs_ipa_node,
  NULL
};
static ul_treeNodeType route_0xd6L_chm_apps_qhs_tlmm0_node =
{
  0xd6ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tlmm0_list,
  &route_0xbeL_chm_apps_qhs_qspi_node,
  &route_0xd8L_chm_apps_qhs_tlmm1_node
};
static ul_treeNodeType route_0xd7L_chm_apps_qhs_tlmm2_node =
{
  0xd7ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tlmm2_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xd8L_chm_apps_qhs_tlmm1_node =
{
  0xd8ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tlmm1_list,
  &route_0xd7L_chm_apps_qhs_tlmm2_node,
  &route_0xdbL_chm_apps_qhs_aoss_node
};
static ul_treeNodeType route_0xdbL_chm_apps_qhs_aoss_node =
{
  0xdbULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_aoss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xdcL_chm_apps_qhs_compute_dsp_node =
{
  0xdcULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_compute_dsp_list,
  &route_0x9bL_chm_apps_qhs_dcc_cfg_node,
  &route_0x13aL_chm_apps_srvc_odd_gemnoc_node
};
static ul_treeNodeType route_0xe0L_chm_apps_qhs_llcc_node =
{
  0xe0ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xecL_chm_apps_qhs_ufs_mem_cfg_node =
{
  0xecULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ufs_mem_cfg_list,
  &route_0xe0L_chm_apps_qhs_llcc_node,
  &route_0xedL_chm_apps_qhs_vsense_ctrl_cfg_node
};
static ul_treeNodeType route_0xedL_chm_apps_qhs_vsense_ctrl_cfg_node =
{
  0xedULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xf3L_chm_apps_qns_llcc_node =
{
  0xf3ULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qns_llcc_list,
  &route_0xecL_chm_apps_qhs_ufs_mem_cfg_node,
  &route_0xfdL_chm_apps_srvc_aggre2_noc_node
};
static ul_treeNodeType route_0xfcL_chm_apps_srvc_aggre1_noc_node =
{
  0xfcULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_aggre1_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xfdL_chm_apps_srvc_aggre2_noc_node =
{
  0xfdULL,                                /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_aggre2_noc_list,
  &route_0xfcL_chm_apps_srvc_aggre1_noc_node,
  &route_0x102L_chm_apps_srvc_sys_gemnoc_node
};
static ul_treeNodeType route_0x102L_chm_apps_srvc_sys_gemnoc_node =
{
  0x102ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_sys_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x11cL_chm_apps_qhs_ahb2phy0_node =
{
  0x11cULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ahb2phy0_list,
  &route_0xf3L_chm_apps_qns_llcc_node,
  &route_0x125L_chm_apps_qhs_qup0_node
};
static ul_treeNodeType route_0x11eL_chm_apps_qhs_cpr_mmcx_node =
{
  0x11eULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cpr_mmcx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x125L_chm_apps_qhs_qup0_node =
{
  0x125ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_qup0_list,
  &route_0x11eL_chm_apps_qhs_cpr_mmcx_node,
  &route_0x127L_chm_apps_srvc_even_gemnoc_node
};
static ul_treeNodeType route_0x127L_chm_apps_srvc_even_gemnoc_node =
{
  0x127ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_even_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x13aL_chm_apps_srvc_odd_gemnoc_node =
{
  0x13aULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_odd_gemnoc_list,
  &route_0x11cL_chm_apps_qhs_ahb2phy0_node,
  &route_0x149L_chm_apps_qhs_dpm_node
};
static ul_treeNodeType route_0x140L_chm_apps_qhs_ahb2phy1_node =
{
  0x140ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ahb2phy1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x142L_chm_apps_qhs_cx_rdpm_node =
{
  0x142ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cx_rdpm_list,
  &route_0x140L_chm_apps_qhs_ahb2phy1_node,
  &route_0x143L_chm_apps_qhs_ipc_router_node
};
static ul_treeNodeType route_0x143L_chm_apps_qhs_ipc_router_node =
{
  0x143ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_ipc_router_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x144L_chm_apps_qhs_isense_node =
{
  0x144ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_isense_list,
  &route_0x142L_chm_apps_qhs_cx_rdpm_node,
  &route_0x146L_chm_apps_qhs_cal_dp1_node
};
static ul_treeNodeType route_0x145L_chm_apps_qhs_cal_dp0_node =
{
  0x145ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cal_dp0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x146L_chm_apps_qhs_cal_dp1_node =
{
  0x146ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cal_dp1_list,
  &route_0x145L_chm_apps_qhs_cal_dp0_node,
  &route_0x148L_chm_apps_qhs_cp_node
};
static ul_treeNodeType route_0x148L_chm_apps_qhs_cp_node =
{
  0x148ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_cp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x149L_chm_apps_qhs_dpm_node =
{
  0x149ULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_dpm_list,
  &route_0x144L_chm_apps_qhs_isense_node,
  &route_0x14bL_chm_apps_qhs_llm_node
};
static ul_treeNodeType route_0x14aL_chm_apps_qhs_dma_bwmon_node =
{
  0x14aULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_dma_bwmon_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x14bL_chm_apps_qhs_llm_node =
{
  0x14bULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_llm_list,
  &route_0x14aL_chm_apps_qhs_dma_bwmon_node,
  &route_0x14cL_chm_apps_qhs_tcm_node
};
static ul_treeNodeType route_0x14cL_chm_apps_qhs_tcm_node =
{
  0x14cULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_qhs_tcm_list,
  NULL,
  &route_0x14dL_chm_apps_srvc_noc_node
};
static ul_treeNodeType route_0x14dL_chm_apps_srvc_noc_node =
{
  0x14dULL,                               /* KEY: MASTER_ID:SLAVE_ID */
  &route_chm_apps_srvc_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000000L_qnm_gpu_ebi_node =
{
  0x600000000ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_ebi_list,
  &route_0x4cL_chm_apps_srvc_cnoc_node,
  &route_0x600000040L_qnm_gpu_qhs_cpr_cx_node
};
static ul_treeNodeType route_0x600000003L_qnm_gpu_qhs_camera_cfg_node =
{
  0x600000003ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_camera_cfg_list,
  NULL,
  &route_0x600000004L_qnm_gpu_qhs_display_cfg_node
};
static ul_treeNodeType route_0x600000004L_qnm_gpu_qhs_display_cfg_node =
{
  0x600000004ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_display_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000000aL_qnm_gpu_qhs_venus_cfg_node =
{
  0x60000000aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_venus_cfg_list,
  &route_0x600000003L_qnm_gpu_qhs_camera_cfg_node,
  &route_0x600000011L_qnm_gpu_srvc_mnoc_node
};
static ul_treeNodeType route_0x60000000bL_qnm_gpu_qhs_gpuss_cfg_node =
{
  0x60000000bULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_gpuss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000011L_qnm_gpu_srvc_mnoc_node =
{
  0x600000011ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_mnoc_list,
  &route_0x60000000bL_qnm_gpu_qhs_gpuss_cfg_node,
  &route_0x600000014L_qnm_gpu_qhs_apss_node
};
static ul_treeNodeType route_0x600000014L_qnm_gpu_qhs_apss_node =
{
  0x600000014ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000015L_qnm_gpu_qhs_lpass_cfg_node =
{
  0x600000015ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_lpass_cfg_list,
  &route_0x60000000aL_qnm_gpu_qhs_venus_cfg_node,
  &route_0x60000001aL_qnm_gpu_qxs_imem_node
};
static ul_treeNodeType route_0x600000016L_qnm_gpu_qhs_usb3_0_node =
{
  0x600000016ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_usb3_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000001aL_qnm_gpu_qxs_imem_node =
{
  0x60000001aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qxs_imem_list,
  &route_0x600000016L_qnm_gpu_qhs_usb3_0_node,
  &route_0x60000001eL_qnm_gpu_xs_qdss_stm_node
};
static ul_treeNodeType route_0x60000001dL_qnm_gpu_srvc_snoc_node =
{
  0x60000001dULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_snoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000001eL_qnm_gpu_xs_qdss_stm_node =
{
  0x60000001eULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_xs_qdss_stm_list,
  &route_0x60000001dL_qnm_gpu_srvc_snoc_node,
  NULL
};
static ul_treeNodeType route_0x600000021L_qnm_gpu_qhs_sdc2_node =
{
  0x600000021ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_sdc2_list,
  &route_0x600000015L_qnm_gpu_qhs_lpass_cfg_node,
  &route_0x60000002fL_qnm_gpu_qhs_clk_ctl_node
};
static ul_treeNodeType route_0x600000022L_qnm_gpu_qhs_sdc4_node =
{
  0x600000022ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_sdc4_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000023L_qnm_gpu_qhs_tsif_node =
{
  0x600000023ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tsif_list,
  &route_0x600000022L_qnm_gpu_qhs_sdc4_node,
  &route_0x600000025L_qnm_gpu_qhs_qup2_node
};
static ul_treeNodeType route_0x600000025L_qnm_gpu_qhs_qup2_node =
{
  0x600000025ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_qup2_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000027L_qnm_gpu_qhs_qup1_node =
{
  0x600000027ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_qup1_list,
  &route_0x600000023L_qnm_gpu_qhs_tsif_node,
  &route_0x600000029L_qnm_gpu_qhs_pdm_node
};
static ul_treeNodeType route_0x600000029L_qnm_gpu_qhs_pdm_node =
{
  0x600000029ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_pdm_list,
  NULL,
  &route_0x60000002cL_qnm_gpu_qhs_prng_node
};
static ul_treeNodeType route_0x60000002cL_qnm_gpu_qhs_prng_node =
{
  0x60000002cULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_prng_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000002fL_qnm_gpu_qhs_clk_ctl_node =
{
  0x60000002fULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_clk_ctl_list,
  &route_0x600000027L_qnm_gpu_qhs_qup1_node,
  &route_0x600000034L_qnm_gpu_qhs_crypto0_cfg_node
};
static ul_treeNodeType route_0x600000032L_qnm_gpu_qhs_tcsr_node =
{
  0x600000032ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tcsr_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000034L_qnm_gpu_qhs_crypto0_cfg_node =
{
  0x600000034ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_crypto0_cfg_list,
  &route_0x600000032L_qnm_gpu_qhs_tcsr_node,
  &route_0x600000036L_qnm_gpu_qhs_imem_cfg_node
};
static ul_treeNodeType route_0x600000036L_qnm_gpu_qhs_imem_cfg_node =
{
  0x600000036ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_imem_cfg_list,
  NULL,
  &route_0x60000003fL_qnm_gpu_qhs_qdss_cfg_node
};
static ul_treeNodeType route_0x60000003fL_qnm_gpu_qhs_qdss_cfg_node =
{
  0x60000003fULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_qdss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000040L_qnm_gpu_qhs_cpr_cx_node =
{
  0x600000040ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cpr_cx_list,
  &route_0x600000021L_qnm_gpu_qhs_sdc2_node,
  &route_0x6000000fdL_qnm_gpu_srvc_aggre2_noc_node
};
static ul_treeNodeType route_0x60000004cL_qnm_gpu_srvc_cnoc_node =
{
  0x60000004cULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_cnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000053L_qnm_gpu_qhs_usb3_1_node =
{
  0x600000053ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_usb3_1_list,
  &route_0x60000004cL_qnm_gpu_srvc_cnoc_node,
  &route_0x600000058L_qnm_gpu_qhs_pcie0_cfg_node
};
static ul_treeNodeType route_0x600000058L_qnm_gpu_qhs_pcie0_cfg_node =
{
  0x600000058ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_pcie0_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000059L_qnm_gpu_qhs_pcie1_cfg_node =
{
  0x600000059ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_pcie1_cfg_list,
  &route_0x600000053L_qnm_gpu_qhs_usb3_1_node,
  &route_0x600000060L_qnm_gpu_qhs_cpr_mx_node
};
static ul_treeNodeType route_0x60000005cL_qnm_gpu_qhs_ufs_card_cfg_node =
{
  0x60000005cULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ufs_card_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000060L_qnm_gpu_qhs_cpr_mx_node =
{
  0x600000060ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cpr_mx_list,
  &route_0x60000005cL_qnm_gpu_qhs_ufs_card_cfg_node,
  &route_0x600000085L_qnm_gpu_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x600000085L_qnm_gpu_xs_sys_tcu_cfg_node =
{
  0x600000085ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000009bL_qnm_gpu_qhs_dcc_cfg_node =
{
  0x60000009bULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_dcc_cfg_list,
  &route_0x600000059L_qnm_gpu_qhs_pcie1_cfg_node,
  &route_0x6000000a6L_qnm_gpu_qxs_pimem_node
};
static ul_treeNodeType route_0x6000000a5L_qnm_gpu_qhs_pcie_modem_cfg_node =
{
  0x6000000a5ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_pcie_modem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000a6L_qnm_gpu_qxs_pimem_node =
{
  0x6000000a6ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qxs_pimem_list,
  &route_0x6000000a5L_qnm_gpu_qhs_pcie_modem_cfg_node,
  &route_0x6000000a7L_qnm_gpu_qhs_pimem_cfg_node
};
static ul_treeNodeType route_0x6000000a7L_qnm_gpu_qhs_pimem_cfg_node =
{
  0x6000000a7ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_pimem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000b7L_qnm_gpu_qhs_ipa_node =
{
  0x6000000b7ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ipa_list,
  &route_0x60000009bL_qnm_gpu_qhs_dcc_cfg_node,
  &route_0x6000000dbL_qnm_gpu_qhs_aoss_node
};
static ul_treeNodeType route_0x6000000beL_qnm_gpu_qhs_qspi_node =
{
  0x6000000beULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_qspi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000d6L_qnm_gpu_qhs_tlmm0_node =
{
  0x6000000d6ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tlmm0_list,
  &route_0x6000000beL_qnm_gpu_qhs_qspi_node,
  NULL
};
static ul_treeNodeType route_0x6000000d7L_qnm_gpu_qhs_tlmm2_node =
{
  0x6000000d7ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tlmm2_list,
  &route_0x6000000d6L_qnm_gpu_qhs_tlmm0_node,
  &route_0x6000000d8L_qnm_gpu_qhs_tlmm1_node
};
static ul_treeNodeType route_0x6000000d8L_qnm_gpu_qhs_tlmm1_node =
{
  0x6000000d8ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tlmm1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000dbL_qnm_gpu_qhs_aoss_node =
{
  0x6000000dbULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_aoss_list,
  &route_0x6000000d7L_qnm_gpu_qhs_tlmm2_node,
  &route_0x6000000ecL_qnm_gpu_qhs_ufs_mem_cfg_node
};
static ul_treeNodeType route_0x6000000dcL_qnm_gpu_qhs_compute_dsp_node =
{
  0x6000000dcULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_compute_dsp_list,
  NULL,
  &route_0x6000000e0L_qnm_gpu_qhs_llcc_node
};
static ul_treeNodeType route_0x6000000e0L_qnm_gpu_qhs_llcc_node =
{
  0x6000000e0ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000ecL_qnm_gpu_qhs_ufs_mem_cfg_node =
{
  0x6000000ecULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ufs_mem_cfg_list,
  &route_0x6000000dcL_qnm_gpu_qhs_compute_dsp_node,
  &route_0x6000000f3L_qnm_gpu_qns_llcc_node
};
static ul_treeNodeType route_0x6000000edL_qnm_gpu_qhs_vsense_ctrl_cfg_node =
{
  0x6000000edULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000f3L_qnm_gpu_qns_llcc_node =
{
  0x6000000f3ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qns_llcc_list,
  &route_0x6000000edL_qnm_gpu_qhs_vsense_ctrl_cfg_node,
  &route_0x6000000fcL_qnm_gpu_srvc_aggre1_noc_node
};
static ul_treeNodeType route_0x6000000fcL_qnm_gpu_srvc_aggre1_noc_node =
{
  0x6000000fcULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_aggre1_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x6000000fdL_qnm_gpu_srvc_aggre2_noc_node =
{
  0x6000000fdULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_aggre2_noc_list,
  &route_0x6000000b7L_qnm_gpu_qhs_ipa_node,
  &route_0x600000144L_qnm_gpu_qhs_isense_node
};
static ul_treeNodeType route_0x600000102L_qnm_gpu_srvc_sys_gemnoc_node =
{
  0x600000102ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_sys_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000011cL_qnm_gpu_qhs_ahb2phy0_node =
{
  0x60000011cULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ahb2phy0_list,
  &route_0x600000102L_qnm_gpu_srvc_sys_gemnoc_node,
  &route_0x60000011eL_qnm_gpu_qhs_cpr_mmcx_node
};
static ul_treeNodeType route_0x60000011eL_qnm_gpu_qhs_cpr_mmcx_node =
{
  0x60000011eULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cpr_mmcx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000125L_qnm_gpu_qhs_qup0_node =
{
  0x600000125ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_qup0_list,
  &route_0x60000011cL_qnm_gpu_qhs_ahb2phy0_node,
  &route_0x600000127L_qnm_gpu_srvc_even_gemnoc_node
};
static ul_treeNodeType route_0x600000127L_qnm_gpu_srvc_even_gemnoc_node =
{
  0x600000127ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_even_gemnoc_list,
  NULL,
  &route_0x60000013aL_qnm_gpu_srvc_odd_gemnoc_node
};
static ul_treeNodeType route_0x60000013aL_qnm_gpu_srvc_odd_gemnoc_node =
{
  0x60000013aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_odd_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000140L_qnm_gpu_qhs_ahb2phy1_node =
{
  0x600000140ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ahb2phy1_list,
  &route_0x600000125L_qnm_gpu_qhs_qup0_node,
  &route_0x600000142L_qnm_gpu_qhs_cx_rdpm_node
};
static ul_treeNodeType route_0x600000142L_qnm_gpu_qhs_cx_rdpm_node =
{
  0x600000142ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cx_rdpm_list,
  NULL,
  &route_0x600000143L_qnm_gpu_qhs_ipc_router_node
};
static ul_treeNodeType route_0x600000143L_qnm_gpu_qhs_ipc_router_node =
{
  0x600000143ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_ipc_router_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000144L_qnm_gpu_qhs_isense_node =
{
  0x600000144ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_isense_list,
  &route_0x600000140L_qnm_gpu_qhs_ahb2phy1_node,
  &route_0x600000149L_qnm_gpu_qhs_dpm_node
};
static ul_treeNodeType route_0x600000145L_qnm_gpu_qhs_cal_dp0_node =
{
  0x600000145ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cal_dp0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000146L_qnm_gpu_qhs_cal_dp1_node =
{
  0x600000146ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cal_dp1_list,
  &route_0x600000145L_qnm_gpu_qhs_cal_dp0_node,
  &route_0x600000148L_qnm_gpu_qhs_cp_node
};
static ul_treeNodeType route_0x600000148L_qnm_gpu_qhs_cp_node =
{
  0x600000148ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_cp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x600000149L_qnm_gpu_qhs_dpm_node =
{
  0x600000149ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_dpm_list,
  &route_0x600000146L_qnm_gpu_qhs_cal_dp1_node,
  &route_0x60000014bL_qnm_gpu_qhs_llm_node
};
static ul_treeNodeType route_0x60000014aL_qnm_gpu_qhs_dma_bwmon_node =
{
  0x60000014aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_dma_bwmon_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000014bL_qnm_gpu_qhs_llm_node =
{
  0x60000014bULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_llm_list,
  &route_0x60000014aL_qnm_gpu_qhs_dma_bwmon_node,
  &route_0x60000014dL_qnm_gpu_srvc_noc_node
};
static ul_treeNodeType route_0x60000014cL_qnm_gpu_qhs_tcm_node =
{
  0x60000014cULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_qhs_tcm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x60000014dL_qnm_gpu_srvc_noc_node =
{
  0x60000014dULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_gpu_srvc_noc_list,
  &route_0x60000014cL_qnm_gpu_qhs_tcm_node,
  NULL
};
static ul_treeNodeType route_0x800000000L_qxm_mdp0_ebi_node =
{
  0x800000000ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_mdp0_ebi_list,
  &route_0x600000000L_qnm_gpu_ebi_node,
  &route_0x2500000014L_qhm_tsif_qhs_apss_node
};
static ul_treeNodeType route_0x8000000f3L_qxm_mdp0_qns_llcc_node =
{
  0x8000000f3ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_mdp0_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x900000000L_qnm_video0_ebi_node =
{
  0x900000000ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_ebi_list,
  &route_0x8000000f3L_qxm_mdp0_qns_llcc_node,
  NULL
};
static ul_treeNodeType route_0x900000014L_qnm_video0_qhs_apss_node =
{
  0x900000014ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_qhs_apss_list,
  &route_0x900000000L_qnm_video0_ebi_node,
  &route_0x90000001eL_qnm_video0_xs_qdss_stm_node
};
static ul_treeNodeType route_0x90000001aL_qnm_video0_qxs_imem_node =
{
  0x90000001aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x90000001eL_qnm_video0_xs_qdss_stm_node =
{
  0x90000001eULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_xs_qdss_stm_list,
  &route_0x90000001aL_qnm_video0_qxs_imem_node,
  NULL
};
static ul_treeNodeType route_0x900000085L_qnm_video0_xs_sys_tcu_cfg_node =
{
  0x900000085ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_xs_sys_tcu_cfg_list,
  &route_0x900000014L_qnm_video0_qhs_apss_node,
  &route_0xa00000014L_qnm_video1_qhs_apss_node
};
static ul_treeNodeType route_0x9000000a6L_qnm_video0_qxs_pimem_node =
{
  0x9000000a6ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x9000000f3L_qnm_video0_qns_llcc_node =
{
  0x9000000f3ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video0_qns_llcc_list,
  &route_0x9000000a6L_qnm_video0_qxs_pimem_node,
  &route_0xa00000000L_qnm_video1_ebi_node
};
static ul_treeNodeType route_0xa00000000L_qnm_video1_ebi_node =
{
  0xa00000000ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xa00000014L_qnm_video1_qhs_apss_node =
{
  0xa00000014ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_qhs_apss_list,
  &route_0x9000000f3L_qnm_video0_qns_llcc_node,
  &route_0xa0000001aL_qnm_video1_qxs_imem_node
};
static ul_treeNodeType route_0xa0000001aL_qnm_video1_qxs_imem_node =
{
  0xa0000001aULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_qxs_imem_list,
  NULL,
  &route_0xa0000001eL_qnm_video1_xs_qdss_stm_node
};
static ul_treeNodeType route_0xa0000001eL_qnm_video1_xs_qdss_stm_node =
{
  0xa0000001eULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xa00000085L_qnm_video1_xs_sys_tcu_cfg_node =
{
  0xa00000085ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_xs_sys_tcu_cfg_list,
  &route_0x900000085L_qnm_video0_xs_sys_tcu_cfg_node,
  &route_0x1300000000L_qhm_qdss_bam_ebi_node
};
static ul_treeNodeType route_0xa000000a6L_qnm_video1_qxs_pimem_node =
{
  0xa000000a6ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_qxs_pimem_list,
  NULL,
  &route_0xa000000f3L_qnm_video1_qns_llcc_node
};
static ul_treeNodeType route_0xa000000f3L_qnm_video1_qns_llcc_node =
{
  0xa000000f3ULL,                         /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video1_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1300000000L_qhm_qdss_bam_ebi_node =
{
  0x1300000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_ebi_list,
  &route_0xa000000a6L_qnm_video1_qxs_pimem_node,
  &route_0x130000001aL_qhm_qdss_bam_qxs_imem_node
};
static ul_treeNodeType route_0x1300000014L_qhm_qdss_bam_qhs_apss_node =
{
  0x1300000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x130000001aL_qhm_qdss_bam_qxs_imem_node =
{
  0x130000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_qxs_imem_list,
  &route_0x1300000014L_qhm_qdss_bam_qhs_apss_node,
  &route_0x130000001eL_qhm_qdss_bam_xs_qdss_stm_node
};
static ul_treeNodeType route_0x130000001eL_qhm_qdss_bam_xs_qdss_stm_node =
{
  0x130000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1300000054L_qhm_qdss_bam_xs_pcie_0_node =
{
  0x1300000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_xs_pcie_0_list,
  &route_0xa00000085L_qnm_video1_xs_sys_tcu_cfg_node,
  &route_0x1700000054L_qxm_crypto_xs_pcie_0_node
};
static ul_treeNodeType route_0x1300000055L_qhm_qdss_bam_xs_pcie_1_node =
{
  0x1300000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1300000085L_qhm_qdss_bam_xs_sys_tcu_cfg_node =
{
  0x1300000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_xs_sys_tcu_cfg_list,
  &route_0x1300000055L_qhm_qdss_bam_xs_pcie_1_node,
  &route_0x13000000a4L_qhm_qdss_bam_xs_pcie_modem_node
};
static ul_treeNodeType route_0x13000000a4L_qhm_qdss_bam_xs_pcie_modem_node =
{
  0x13000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x13000000a6L_qhm_qdss_bam_qxs_pimem_node =
{
  0x13000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_qxs_pimem_list,
  &route_0x1300000085L_qhm_qdss_bam_xs_sys_tcu_cfg_node,
  &route_0x1700000000L_qxm_crypto_ebi_node
};
static ul_treeNodeType route_0x13000000f3L_qhm_qdss_bam_qns_llcc_node =
{
  0x13000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qdss_bam_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1700000000L_qxm_crypto_ebi_node =
{
  0x1700000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_ebi_list,
  &route_0x13000000f3L_qhm_qdss_bam_qns_llcc_node,
  &route_0x170000001aL_qxm_crypto_qxs_imem_node
};
static ul_treeNodeType route_0x1700000014L_qxm_crypto_qhs_apss_node =
{
  0x1700000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x170000001aL_qxm_crypto_qxs_imem_node =
{
  0x170000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_qxs_imem_list,
  &route_0x1700000014L_qxm_crypto_qhs_apss_node,
  &route_0x170000001eL_qxm_crypto_xs_qdss_stm_node
};
static ul_treeNodeType route_0x170000001eL_qxm_crypto_xs_qdss_stm_node =
{
  0x170000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1700000054L_qxm_crypto_xs_pcie_0_node =
{
  0x1700000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_xs_pcie_0_list,
  &route_0x13000000a6L_qhm_qdss_bam_qxs_pimem_node,
  &route_0x1700000085L_qxm_crypto_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x1700000055L_qxm_crypto_xs_pcie_1_node =
{
  0x1700000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1700000085L_qxm_crypto_xs_sys_tcu_cfg_node =
{
  0x1700000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_xs_sys_tcu_cfg_list,
  &route_0x1700000055L_qxm_crypto_xs_pcie_1_node,
  &route_0x17000000a6L_qxm_crypto_qxs_pimem_node
};
static ul_treeNodeType route_0x17000000a4L_qxm_crypto_xs_pcie_modem_node =
{
  0x17000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x17000000a6L_qxm_crypto_qxs_pimem_node =
{
  0x17000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_qxs_pimem_list,
  &route_0x17000000a4L_qxm_crypto_xs_pcie_modem_node,
  &route_0x17000000f3L_qxm_crypto_qns_llcc_node
};
static ul_treeNodeType route_0x17000000f3L_qxm_crypto_qns_llcc_node =
{
  0x17000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_crypto_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1f00000000L_xm_qdss_etr_ebi_node =
{
  0x1f00000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_ebi_list,
  &route_0x1300000054L_qhm_qdss_bam_xs_pcie_0_node,
  &route_0x20000000a4L_xm_usb3_0_xs_pcie_modem_node
};
static ul_treeNodeType route_0x1f00000014L_xm_qdss_etr_qhs_apss_node =
{
  0x1f00000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1f0000001aL_xm_qdss_etr_qxs_imem_node =
{
  0x1f0000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_qxs_imem_list,
  &route_0x1f00000014L_xm_qdss_etr_qhs_apss_node,
  &route_0x1f0000001eL_xm_qdss_etr_xs_qdss_stm_node
};
static ul_treeNodeType route_0x1f0000001eL_xm_qdss_etr_xs_qdss_stm_node =
{
  0x1f0000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1f00000054L_xm_qdss_etr_xs_pcie_0_node =
{
  0x1f00000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_xs_pcie_0_list,
  &route_0x1f0000001aL_xm_qdss_etr_qxs_imem_node,
  &route_0x1f00000085L_xm_qdss_etr_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x1f00000055L_xm_qdss_etr_xs_pcie_1_node =
{
  0x1f00000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1f00000085L_xm_qdss_etr_xs_sys_tcu_cfg_node =
{
  0x1f00000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_xs_sys_tcu_cfg_list,
  &route_0x1f00000055L_xm_qdss_etr_xs_pcie_1_node,
  &route_0x1f000000a6L_xm_qdss_etr_qxs_pimem_node
};
static ul_treeNodeType route_0x1f000000a4L_xm_qdss_etr_xs_pcie_modem_node =
{
  0x1f000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x1f000000a6L_xm_qdss_etr_qxs_pimem_node =
{
  0x1f000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_qxs_pimem_list,
  &route_0x1f000000a4L_xm_qdss_etr_xs_pcie_modem_node,
  &route_0x1f000000f3L_xm_qdss_etr_qns_llcc_node
};
static ul_treeNodeType route_0x1f000000f3L_xm_qdss_etr_qns_llcc_node =
{
  0x1f000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_etr_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2000000000L_xm_usb3_0_ebi_node =
{
  0x2000000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_ebi_list,
  &route_0x1f00000054L_xm_qdss_etr_xs_pcie_0_node,
  &route_0x200000001eL_xm_usb3_0_xs_qdss_stm_node
};
static ul_treeNodeType route_0x2000000014L_xm_usb3_0_qhs_apss_node =
{
  0x2000000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x200000001aL_xm_usb3_0_qxs_imem_node =
{
  0x200000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_qxs_imem_list,
  &route_0x2000000014L_xm_usb3_0_qhs_apss_node,
  NULL
};
static ul_treeNodeType route_0x200000001eL_xm_usb3_0_xs_qdss_stm_node =
{
  0x200000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_xs_qdss_stm_list,
  &route_0x200000001aL_xm_usb3_0_qxs_imem_node,
  &route_0x2000000055L_xm_usb3_0_xs_pcie_1_node
};
static ul_treeNodeType route_0x2000000054L_xm_usb3_0_xs_pcie_0_node =
{
  0x2000000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_xs_pcie_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2000000055L_xm_usb3_0_xs_pcie_1_node =
{
  0x2000000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_xs_pcie_1_list,
  &route_0x2000000054L_xm_usb3_0_xs_pcie_0_node,
  &route_0x2000000085L_xm_usb3_0_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x2000000085L_xm_usb3_0_xs_sys_tcu_cfg_node =
{
  0x2000000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x20000000a4L_xm_usb3_0_xs_pcie_modem_node =
{
  0x20000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_xs_pcie_modem_list,
  &route_0x2000000000L_xm_usb3_0_ebi_node,
  &route_0x2300000085L_xm_sdc2_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x20000000a6L_xm_usb3_0_qxs_pimem_node =
{
  0x20000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x20000000f3L_xm_usb3_0_qns_llcc_node =
{
  0x20000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_0_qns_llcc_list,
  &route_0x20000000a6L_xm_usb3_0_qxs_pimem_node,
  &route_0x2300000014L_xm_sdc2_qhs_apss_node
};
static ul_treeNodeType route_0x2300000000L_xm_sdc2_ebi_node =
{
  0x2300000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2300000014L_xm_sdc2_qhs_apss_node =
{
  0x2300000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_qhs_apss_list,
  &route_0x2300000000L_xm_sdc2_ebi_node,
  NULL
};
static ul_treeNodeType route_0x230000001aL_xm_sdc2_qxs_imem_node =
{
  0x230000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_qxs_imem_list,
  &route_0x20000000f3L_xm_usb3_0_qns_llcc_node,
  &route_0x2300000054L_xm_sdc2_xs_pcie_0_node
};
static ul_treeNodeType route_0x230000001eL_xm_sdc2_xs_qdss_stm_node =
{
  0x230000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2300000054L_xm_sdc2_xs_pcie_0_node =
{
  0x2300000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_xs_pcie_0_list,
  &route_0x230000001eL_xm_sdc2_xs_qdss_stm_node,
  &route_0x2300000055L_xm_sdc2_xs_pcie_1_node
};
static ul_treeNodeType route_0x2300000055L_xm_sdc2_xs_pcie_1_node =
{
  0x2300000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2300000085L_xm_sdc2_xs_sys_tcu_cfg_node =
{
  0x2300000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_xs_sys_tcu_cfg_list,
  &route_0x230000001aL_xm_sdc2_qxs_imem_node,
  &route_0x240000001aL_xm_sdc4_qxs_imem_node
};
static ul_treeNodeType route_0x23000000a4L_xm_sdc2_xs_pcie_modem_node =
{
  0x23000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_xs_pcie_modem_list,
  NULL,
  &route_0x23000000a6L_xm_sdc2_qxs_pimem_node
};
static ul_treeNodeType route_0x23000000a6L_xm_sdc2_qxs_pimem_node =
{
  0x23000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x23000000f3L_xm_sdc2_qns_llcc_node =
{
  0x23000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc2_qns_llcc_list,
  &route_0x23000000a4L_xm_sdc2_xs_pcie_modem_node,
  &route_0x2400000000L_xm_sdc4_ebi_node
};
static ul_treeNodeType route_0x2400000000L_xm_sdc4_ebi_node =
{
  0x2400000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_ebi_list,
  NULL,
  &route_0x2400000014L_xm_sdc4_qhs_apss_node
};
static ul_treeNodeType route_0x2400000014L_xm_sdc4_qhs_apss_node =
{
  0x2400000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x240000001aL_xm_sdc4_qxs_imem_node =
{
  0x240000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_qxs_imem_list,
  &route_0x23000000f3L_xm_sdc2_qns_llcc_node,
  &route_0x2400000085L_xm_sdc4_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x240000001eL_xm_sdc4_xs_qdss_stm_node =
{
  0x240000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2400000054L_xm_sdc4_xs_pcie_0_node =
{
  0x2400000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_xs_pcie_0_list,
  &route_0x240000001eL_xm_sdc4_xs_qdss_stm_node,
  &route_0x2400000055L_xm_sdc4_xs_pcie_1_node
};
static ul_treeNodeType route_0x2400000055L_xm_sdc4_xs_pcie_1_node =
{
  0x2400000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2400000085L_xm_sdc4_xs_sys_tcu_cfg_node =
{
  0x2400000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_xs_sys_tcu_cfg_list,
  &route_0x2400000054L_xm_sdc4_xs_pcie_0_node,
  &route_0x24000000f3L_xm_sdc4_qns_llcc_node
};
static ul_treeNodeType route_0x24000000a4L_xm_sdc4_xs_pcie_modem_node =
{
  0x24000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x24000000a6L_xm_sdc4_qxs_pimem_node =
{
  0x24000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_qxs_pimem_list,
  &route_0x24000000a4L_xm_sdc4_xs_pcie_modem_node,
  NULL
};
static ul_treeNodeType route_0x24000000f3L_xm_sdc4_qns_llcc_node =
{
  0x24000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_sdc4_qns_llcc_list,
  &route_0x24000000a6L_xm_sdc4_qxs_pimem_node,
  &route_0x2500000000L_qhm_tsif_ebi_node
};
static ul_treeNodeType route_0x2500000000L_qhm_tsif_ebi_node =
{
  0x2500000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2500000014L_qhm_tsif_qhs_apss_node =
{
  0x2500000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_qhs_apss_list,
  &route_0x1f00000000L_xm_qdss_etr_ebi_node,
  &route_0x29000000a6L_qhm_qup1_qxs_pimem_node
};
static ul_treeNodeType route_0x250000001aL_qhm_tsif_qxs_imem_node =
{
  0x250000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x250000001eL_qhm_tsif_xs_qdss_stm_node =
{
  0x250000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_xs_qdss_stm_list,
  &route_0x250000001aL_qhm_tsif_qxs_imem_node,
  NULL
};
static ul_treeNodeType route_0x2500000054L_qhm_tsif_xs_pcie_0_node =
{
  0x2500000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_xs_pcie_0_list,
  &route_0x250000001eL_qhm_tsif_xs_qdss_stm_node,
  &route_0x2500000055L_qhm_tsif_xs_pcie_1_node
};
static ul_treeNodeType route_0x2500000055L_qhm_tsif_xs_pcie_1_node =
{
  0x2500000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2500000085L_qhm_tsif_xs_sys_tcu_cfg_node =
{
  0x2500000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_xs_sys_tcu_cfg_list,
  &route_0x2500000054L_qhm_tsif_xs_pcie_0_node,
  &route_0x25000000a6L_qhm_tsif_qxs_pimem_node
};
static ul_treeNodeType route_0x25000000a4L_qhm_tsif_xs_pcie_modem_node =
{
  0x25000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x25000000a6L_qhm_tsif_qxs_pimem_node =
{
  0x25000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_qxs_pimem_list,
  &route_0x25000000a4L_qhm_tsif_xs_pcie_modem_node,
  &route_0x2700000000L_qhm_qup2_ebi_node
};
static ul_treeNodeType route_0x25000000f3L_qhm_tsif_qns_llcc_node =
{
  0x25000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_tsif_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2700000000L_qhm_qup2_ebi_node =
{
  0x2700000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_ebi_list,
  &route_0x25000000f3L_qhm_tsif_qns_llcc_node,
  &route_0x2700000014L_qhm_qup2_qhs_apss_node
};
static ul_treeNodeType route_0x2700000014L_qhm_qup2_qhs_apss_node =
{
  0x2700000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x270000001aL_qhm_qup2_qxs_imem_node =
{
  0x270000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_qxs_imem_list,
  &route_0x2500000085L_qhm_tsif_xs_sys_tcu_cfg_node,
  &route_0x2900000014L_qhm_qup1_qhs_apss_node
};
static ul_treeNodeType route_0x270000001eL_qhm_qup2_xs_qdss_stm_node =
{
  0x270000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2700000054L_qhm_qup2_xs_pcie_0_node =
{
  0x2700000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_xs_pcie_0_list,
  &route_0x270000001eL_qhm_qup2_xs_qdss_stm_node,
  NULL
};
static ul_treeNodeType route_0x2700000055L_qhm_qup2_xs_pcie_1_node =
{
  0x2700000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_xs_pcie_1_list,
  &route_0x2700000054L_qhm_qup2_xs_pcie_0_node,
  &route_0x27000000a6L_qhm_qup2_qxs_pimem_node
};
static ul_treeNodeType route_0x2700000085L_qhm_qup2_xs_sys_tcu_cfg_node =
{
  0x2700000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_xs_sys_tcu_cfg_list,
  NULL,
  &route_0x27000000a4L_qhm_qup2_xs_pcie_modem_node
};
static ul_treeNodeType route_0x27000000a4L_qhm_qup2_xs_pcie_modem_node =
{
  0x27000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x27000000a6L_qhm_qup2_qxs_pimem_node =
{
  0x27000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_qxs_pimem_list,
  &route_0x2700000085L_qhm_qup2_xs_sys_tcu_cfg_node,
  &route_0x27000000f3L_qhm_qup2_qns_llcc_node
};
static ul_treeNodeType route_0x27000000f3L_qhm_qup2_qns_llcc_node =
{
  0x27000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup2_qns_llcc_list,
  NULL,
  &route_0x2900000000L_qhm_qup1_ebi_node
};
static ul_treeNodeType route_0x2900000000L_qhm_qup1_ebi_node =
{
  0x2900000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2900000014L_qhm_qup1_qhs_apss_node =
{
  0x2900000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_qhs_apss_list,
  &route_0x2700000055L_qhm_qup2_xs_pcie_1_node,
  &route_0x2900000054L_qhm_qup1_xs_pcie_0_node
};
static ul_treeNodeType route_0x290000001aL_qhm_qup1_qxs_imem_node =
{
  0x290000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x290000001eL_qhm_qup1_xs_qdss_stm_node =
{
  0x290000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_xs_qdss_stm_list,
  &route_0x290000001aL_qhm_qup1_qxs_imem_node,
  NULL
};
static ul_treeNodeType route_0x2900000054L_qhm_qup1_xs_pcie_0_node =
{
  0x2900000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_xs_pcie_0_list,
  &route_0x290000001eL_qhm_qup1_xs_qdss_stm_node,
  &route_0x2900000085L_qhm_qup1_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x2900000055L_qhm_qup1_xs_pcie_1_node =
{
  0x2900000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x2900000085L_qhm_qup1_xs_sys_tcu_cfg_node =
{
  0x2900000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_xs_sys_tcu_cfg_list,
  &route_0x2900000055L_qhm_qup1_xs_pcie_1_node,
  &route_0x29000000a4L_qhm_qup1_xs_pcie_modem_node
};
static ul_treeNodeType route_0x29000000a4L_qhm_qup1_xs_pcie_modem_node =
{
  0x29000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_xs_pcie_modem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x29000000a6L_qhm_qup1_qxs_pimem_node =
{
  0x29000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_qxs_pimem_list,
  &route_0x270000001aL_qhm_qup2_qxs_imem_node,
  &route_0x310000005cL_xm_qdss_dap_qhs_ufs_card_cfg_node
};
static ul_treeNodeType route_0x29000000f3L_qhm_qup1_qns_llcc_node =
{
  0x29000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup1_qns_llcc_list,
  NULL,
  &route_0x3100000000L_xm_qdss_dap_ebi_node
};
static ul_treeNodeType route_0x3100000000L_xm_qdss_dap_ebi_node =
{
  0x3100000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000003L_xm_qdss_dap_qhs_camera_cfg_node =
{
  0x3100000003ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_camera_cfg_list,
  &route_0x29000000f3L_qhm_qup1_qns_llcc_node,
  &route_0x3100000011L_xm_qdss_dap_srvc_mnoc_node
};
static ul_treeNodeType route_0x3100000004L_xm_qdss_dap_qhs_display_cfg_node =
{
  0x3100000004ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_display_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000000aL_xm_qdss_dap_qhs_venus_cfg_node =
{
  0x310000000aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_venus_cfg_list,
  &route_0x3100000004L_xm_qdss_dap_qhs_display_cfg_node,
  &route_0x310000000bL_xm_qdss_dap_qhs_gpuss_cfg_node
};
static ul_treeNodeType route_0x310000000bL_xm_qdss_dap_qhs_gpuss_cfg_node =
{
  0x310000000bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_gpuss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000011L_xm_qdss_dap_srvc_mnoc_node =
{
  0x3100000011ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_mnoc_list,
  &route_0x310000000aL_xm_qdss_dap_qhs_venus_cfg_node,
  &route_0x3100000015L_xm_qdss_dap_qhs_lpass_cfg_node
};
static ul_treeNodeType route_0x3100000015L_xm_qdss_dap_qhs_lpass_cfg_node =
{
  0x3100000015ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_lpass_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000016L_xm_qdss_dap_qhs_usb3_0_node =
{
  0x3100000016ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_usb3_0_list,
  &route_0x3100000003L_xm_qdss_dap_qhs_camera_cfg_node,
  &route_0x3100000023L_xm_qdss_dap_qhs_tsif_node
};
static ul_treeNodeType route_0x310000001dL_xm_qdss_dap_srvc_snoc_node =
{
  0x310000001dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_snoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000021L_xm_qdss_dap_qhs_sdc2_node =
{
  0x3100000021ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_sdc2_list,
  &route_0x310000001dL_xm_qdss_dap_srvc_snoc_node,
  &route_0x3100000022L_xm_qdss_dap_qhs_sdc4_node
};
static ul_treeNodeType route_0x3100000022L_xm_qdss_dap_qhs_sdc4_node =
{
  0x3100000022ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_sdc4_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000023L_xm_qdss_dap_qhs_tsif_node =
{
  0x3100000023ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tsif_list,
  &route_0x3100000021L_xm_qdss_dap_qhs_sdc2_node,
  &route_0x3100000025L_xm_qdss_dap_qhs_qup2_node
};
static ul_treeNodeType route_0x3100000025L_xm_qdss_dap_qhs_qup2_node =
{
  0x3100000025ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_qup2_list,
  NULL,
  &route_0x3100000027L_xm_qdss_dap_qhs_qup1_node
};
static ul_treeNodeType route_0x3100000027L_xm_qdss_dap_qhs_qup1_node =
{
  0x3100000027ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_qup1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000029L_xm_qdss_dap_qhs_pdm_node =
{
  0x3100000029ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_pdm_list,
  &route_0x3100000016L_xm_qdss_dap_qhs_usb3_0_node,
  &route_0x310000004cL_xm_qdss_dap_srvc_cnoc_node
};
static ul_treeNodeType route_0x310000002cL_xm_qdss_dap_qhs_prng_node =
{
  0x310000002cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_prng_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000002fL_xm_qdss_dap_qhs_clk_ctl_node =
{
  0x310000002fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_clk_ctl_list,
  &route_0x310000002cL_xm_qdss_dap_qhs_prng_node,
  &route_0x3100000032L_xm_qdss_dap_qhs_tcsr_node
};
static ul_treeNodeType route_0x3100000032L_xm_qdss_dap_qhs_tcsr_node =
{
  0x3100000032ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tcsr_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000034L_xm_qdss_dap_qhs_crypto0_cfg_node =
{
  0x3100000034ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_crypto0_cfg_list,
  &route_0x310000002fL_xm_qdss_dap_qhs_clk_ctl_node,
  &route_0x310000003fL_xm_qdss_dap_qhs_qdss_cfg_node
};
static ul_treeNodeType route_0x3100000036L_xm_qdss_dap_qhs_imem_cfg_node =
{
  0x3100000036ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_imem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000003fL_xm_qdss_dap_qhs_qdss_cfg_node =
{
  0x310000003fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_qdss_cfg_list,
  &route_0x3100000036L_xm_qdss_dap_qhs_imem_cfg_node,
  &route_0x3100000040L_xm_qdss_dap_qhs_cpr_cx_node
};
static ul_treeNodeType route_0x3100000040L_xm_qdss_dap_qhs_cpr_cx_node =
{
  0x3100000040ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cpr_cx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000004cL_xm_qdss_dap_srvc_cnoc_node =
{
  0x310000004cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_cnoc_list,
  &route_0x3100000034L_xm_qdss_dap_qhs_crypto0_cfg_node,
  &route_0x3100000055L_xm_qdss_dap_xs_pcie_1_node
};
static ul_treeNodeType route_0x3100000053L_xm_qdss_dap_qhs_usb3_1_node =
{
  0x3100000053ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_usb3_1_list,
  NULL,
  &route_0x3100000054L_xm_qdss_dap_xs_pcie_0_node
};
static ul_treeNodeType route_0x3100000054L_xm_qdss_dap_xs_pcie_0_node =
{
  0x3100000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_xs_pcie_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000055L_xm_qdss_dap_xs_pcie_1_node =
{
  0x3100000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_xs_pcie_1_list,
  &route_0x3100000053L_xm_qdss_dap_qhs_usb3_1_node,
  &route_0x3100000059L_xm_qdss_dap_qhs_pcie1_cfg_node
};
static ul_treeNodeType route_0x3100000058L_xm_qdss_dap_qhs_pcie0_cfg_node =
{
  0x3100000058ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_pcie0_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000059L_xm_qdss_dap_qhs_pcie1_cfg_node =
{
  0x3100000059ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_pcie1_cfg_list,
  &route_0x3100000058L_xm_qdss_dap_qhs_pcie0_cfg_node,
  NULL
};
static ul_treeNodeType route_0x310000005cL_xm_qdss_dap_qhs_ufs_card_cfg_node =
{
  0x310000005cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ufs_card_cfg_list,
  &route_0x3100000029L_xm_qdss_dap_qhs_pdm_node,
  &route_0x31000000dbL_xm_qdss_dap_qhs_aoss_node
};
static ul_treeNodeType route_0x3100000060L_xm_qdss_dap_qhs_cpr_mx_node =
{
  0x3100000060ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cpr_mx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000009bL_xm_qdss_dap_qhs_dcc_cfg_node =
{
  0x310000009bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_dcc_cfg_list,
  &route_0x3100000060L_xm_qdss_dap_qhs_cpr_mx_node,
  NULL
};
static ul_treeNodeType route_0x31000000a4L_xm_qdss_dap_xs_pcie_modem_node =
{
  0x31000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_xs_pcie_modem_list,
  &route_0x310000009bL_xm_qdss_dap_qhs_dcc_cfg_node,
  &route_0x31000000a7L_xm_qdss_dap_qhs_pimem_cfg_node
};
static ul_treeNodeType route_0x31000000a5L_xm_qdss_dap_qhs_pcie_modem_cfg_node =
{
  0x31000000a5ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_pcie_modem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000a7L_xm_qdss_dap_qhs_pimem_cfg_node =
{
  0x31000000a7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_pimem_cfg_list,
  &route_0x31000000a5L_xm_qdss_dap_qhs_pcie_modem_cfg_node,
  NULL
};
static ul_treeNodeType route_0x31000000b7L_xm_qdss_dap_qhs_ipa_node =
{
  0x31000000b7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ipa_list,
  &route_0x31000000a4L_xm_qdss_dap_xs_pcie_modem_node,
  &route_0x31000000d6L_xm_qdss_dap_qhs_tlmm0_node
};
static ul_treeNodeType route_0x31000000beL_xm_qdss_dap_qhs_qspi_node =
{
  0x31000000beULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_qspi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000d6L_xm_qdss_dap_qhs_tlmm0_node =
{
  0x31000000d6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tlmm0_list,
  &route_0x31000000beL_xm_qdss_dap_qhs_qspi_node,
  &route_0x31000000d7L_xm_qdss_dap_qhs_tlmm2_node
};
static ul_treeNodeType route_0x31000000d7L_xm_qdss_dap_qhs_tlmm2_node =
{
  0x31000000d7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tlmm2_list,
  NULL,
  &route_0x31000000d8L_xm_qdss_dap_qhs_tlmm1_node
};
static ul_treeNodeType route_0x31000000d8L_xm_qdss_dap_qhs_tlmm1_node =
{
  0x31000000d8ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tlmm1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000dbL_xm_qdss_dap_qhs_aoss_node =
{
  0x31000000dbULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_aoss_list,
  &route_0x31000000b7L_xm_qdss_dap_qhs_ipa_node,
  &route_0x31000000f3L_xm_qdss_dap_qns_llcc_node
};
static ul_treeNodeType route_0x31000000dcL_xm_qdss_dap_qhs_compute_dsp_node =
{
  0x31000000dcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_compute_dsp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000e0L_xm_qdss_dap_qhs_llcc_node =
{
  0x31000000e0ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_llcc_list,
  &route_0x31000000dcL_xm_qdss_dap_qhs_compute_dsp_node,
  &route_0x31000000ecL_xm_qdss_dap_qhs_ufs_mem_cfg_node
};
static ul_treeNodeType route_0x31000000ecL_xm_qdss_dap_qhs_ufs_mem_cfg_node =
{
  0x31000000ecULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ufs_mem_cfg_list,
  NULL,
  &route_0x31000000edL_xm_qdss_dap_qhs_vsense_ctrl_cfg_node
};
static ul_treeNodeType route_0x31000000edL_xm_qdss_dap_qhs_vsense_ctrl_cfg_node =
{
  0x31000000edULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000f3L_xm_qdss_dap_qns_llcc_node =
{
  0x31000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qns_llcc_list,
  &route_0x31000000e0L_xm_qdss_dap_qhs_llcc_node,
  &route_0x31000000fdL_xm_qdss_dap_srvc_aggre2_noc_node
};
static ul_treeNodeType route_0x31000000fcL_xm_qdss_dap_srvc_aggre1_noc_node =
{
  0x31000000fcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_aggre1_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x31000000fdL_xm_qdss_dap_srvc_aggre2_noc_node =
{
  0x31000000fdULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_aggre2_noc_list,
  &route_0x31000000fcL_xm_qdss_dap_srvc_aggre1_noc_node,
  &route_0x310000011cL_xm_qdss_dap_qhs_ahb2phy0_node
};
static ul_treeNodeType route_0x3100000102L_xm_qdss_dap_srvc_sys_gemnoc_node =
{
  0x3100000102ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_sys_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000011cL_xm_qdss_dap_qhs_ahb2phy0_node =
{
  0x310000011cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ahb2phy0_list,
  &route_0x3100000102L_xm_qdss_dap_srvc_sys_gemnoc_node,
  &route_0x310000011eL_xm_qdss_dap_qhs_cpr_mmcx_node
};
static ul_treeNodeType route_0x310000011eL_xm_qdss_dap_qhs_cpr_mmcx_node =
{
  0x310000011eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cpr_mmcx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000125L_xm_qdss_dap_qhs_qup0_node =
{
  0x3100000125ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_qup0_list,
  &route_0x800000000L_qxm_mdp0_ebi_node,
  &route_0xc3000000dcL_qnm_npu_qhs_compute_dsp_node
};
static ul_treeNodeType route_0x3100000127L_xm_qdss_dap_srvc_even_gemnoc_node =
{
  0x3100000127ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_even_gemnoc_list,
  NULL,
  &route_0x310000013aL_xm_qdss_dap_srvc_odd_gemnoc_node
};
static ul_treeNodeType route_0x310000013aL_xm_qdss_dap_srvc_odd_gemnoc_node =
{
  0x310000013aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_odd_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000140L_xm_qdss_dap_qhs_ahb2phy1_node =
{
  0x3100000140ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ahb2phy1_list,
  &route_0x3100000127L_xm_qdss_dap_srvc_even_gemnoc_node,
  &route_0x3100000142L_xm_qdss_dap_qhs_cx_rdpm_node
};
static ul_treeNodeType route_0x3100000142L_xm_qdss_dap_qhs_cx_rdpm_node =
{
  0x3100000142ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cx_rdpm_list,
  NULL,
  &route_0x3100000143L_xm_qdss_dap_qhs_ipc_router_node
};
static ul_treeNodeType route_0x3100000143L_xm_qdss_dap_qhs_ipc_router_node =
{
  0x3100000143ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_ipc_router_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000144L_xm_qdss_dap_qhs_isense_node =
{
  0x3100000144ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_isense_list,
  &route_0x3100000140L_xm_qdss_dap_qhs_ahb2phy1_node,
  &route_0x310000014aL_xm_qdss_dap_qhs_dma_bwmon_node
};
static ul_treeNodeType route_0x3100000145L_xm_qdss_dap_qhs_cal_dp0_node =
{
  0x3100000145ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cal_dp0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3100000146L_xm_qdss_dap_qhs_cal_dp1_node =
{
  0x3100000146ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cal_dp1_list,
  &route_0x3100000145L_xm_qdss_dap_qhs_cal_dp0_node,
  &route_0x3100000148L_xm_qdss_dap_qhs_cp_node
};
static ul_treeNodeType route_0x3100000148L_xm_qdss_dap_qhs_cp_node =
{
  0x3100000148ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_cp_list,
  NULL,
  &route_0x3100000149L_xm_qdss_dap_qhs_dpm_node
};
static ul_treeNodeType route_0x3100000149L_xm_qdss_dap_qhs_dpm_node =
{
  0x3100000149ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_dpm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000014aL_xm_qdss_dap_qhs_dma_bwmon_node =
{
  0x310000014aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_dma_bwmon_list,
  &route_0x3100000146L_xm_qdss_dap_qhs_cal_dp1_node,
  &route_0x310000014dL_xm_qdss_dap_srvc_noc_node
};
static ul_treeNodeType route_0x310000014bL_xm_qdss_dap_qhs_llm_node =
{
  0x310000014bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_llm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x310000014cL_xm_qdss_dap_qhs_tcm_node =
{
  0x310000014cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_qhs_tcm_list,
  &route_0x310000014bL_xm_qdss_dap_qhs_llm_node,
  NULL
};
static ul_treeNodeType route_0x310000014dL_xm_qdss_dap_srvc_noc_node =
{
  0x310000014dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_qdss_dap_srvc_noc_list,
  &route_0x310000014cL_xm_qdss_dap_qhs_tcm_node,
  &route_0x3b00000000L_qxm_ipa_ebi_node
};
static ul_treeNodeType route_0x3b00000000L_qxm_ipa_ebi_node =
{
  0x3b00000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3b00000014L_qxm_ipa_qhs_apss_node =
{
  0x3b00000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_qhs_apss_list,
  &route_0x3100000144L_xm_qdss_dap_qhs_isense_node,
  &route_0x4200000000L_xm_pcie3_1_ebi_node
};
static ul_treeNodeType route_0x3b0000001aL_qxm_ipa_qxs_imem_node =
{
  0x3b0000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3b0000001eL_qxm_ipa_xs_qdss_stm_node =
{
  0x3b0000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_xs_qdss_stm_list,
  &route_0x3b0000001aL_qxm_ipa_qxs_imem_node,
  &route_0x3b00000054L_qxm_ipa_xs_pcie_0_node
};
static ul_treeNodeType route_0x3b00000054L_qxm_ipa_xs_pcie_0_node =
{
  0x3b00000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_xs_pcie_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3b00000055L_qxm_ipa_xs_pcie_1_node =
{
  0x3b00000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_xs_pcie_1_list,
  &route_0x3b0000001eL_qxm_ipa_xs_qdss_stm_node,
  &route_0x3b000000a4L_qxm_ipa_xs_pcie_modem_node
};
static ul_treeNodeType route_0x3b00000085L_qxm_ipa_xs_sys_tcu_cfg_node =
{
  0x3b00000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3b000000a4L_qxm_ipa_xs_pcie_modem_node =
{
  0x3b000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_xs_pcie_modem_list,
  &route_0x3b00000085L_qxm_ipa_xs_sys_tcu_cfg_node,
  &route_0x3b000000a6L_qxm_ipa_qxs_pimem_node
};
static ul_treeNodeType route_0x3b000000a6L_qxm_ipa_qxs_pimem_node =
{
  0x3b000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3b000000f3L_qxm_ipa_qns_llcc_node =
{
  0x3b000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_ipa_qns_llcc_list,
  &route_0x3b00000055L_qxm_ipa_xs_pcie_1_node,
  &route_0x410000001aL_xm_pcie3_0_qxs_imem_node
};
static ul_treeNodeType route_0x3d00000000L_qxm_mdp1_ebi_node =
{
  0x3d00000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_mdp1_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x3d000000f3L_qxm_mdp1_qns_llcc_node =
{
  0x3d000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_mdp1_qns_llcc_list,
  &route_0x3d00000000L_qxm_mdp1_ebi_node,
  &route_0x4100000014L_xm_pcie3_0_qhs_apss_node
};
static ul_treeNodeType route_0x4100000000L_xm_pcie3_0_ebi_node =
{
  0x4100000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4100000014L_xm_pcie3_0_qhs_apss_node =
{
  0x4100000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_qhs_apss_list,
  &route_0x4100000000L_xm_pcie3_0_ebi_node,
  NULL
};
static ul_treeNodeType route_0x410000001aL_xm_pcie3_0_qxs_imem_node =
{
  0x410000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_qxs_imem_list,
  &route_0x3d000000f3L_qxm_mdp1_qns_llcc_node,
  &route_0x41000000a6L_xm_pcie3_0_qxs_pimem_node
};
static ul_treeNodeType route_0x410000001eL_xm_pcie3_0_xs_qdss_stm_node =
{
  0x410000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_xs_qdss_stm_list,
  NULL,
  &route_0x4100000085L_xm_pcie3_0_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x4100000085L_xm_pcie3_0_xs_sys_tcu_cfg_node =
{
  0x4100000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x41000000a6L_xm_pcie3_0_qxs_pimem_node =
{
  0x41000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_qxs_pimem_list,
  &route_0x410000001eL_xm_pcie3_0_xs_qdss_stm_node,
  &route_0x41000000f3L_xm_pcie3_0_qns_llcc_node
};
static ul_treeNodeType route_0x41000000f3L_xm_pcie3_0_qns_llcc_node =
{
  0x41000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_0_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4200000000L_xm_pcie3_1_ebi_node =
{
  0x4200000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_ebi_list,
  &route_0x3b000000f3L_qxm_ipa_qns_llcc_node,
  &route_0x42000000f3L_xm_pcie3_1_qns_llcc_node
};
static ul_treeNodeType route_0x4200000014L_xm_pcie3_1_qhs_apss_node =
{
  0x4200000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x420000001aL_xm_pcie3_1_qxs_imem_node =
{
  0x420000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_qxs_imem_list,
  &route_0x4200000014L_xm_pcie3_1_qhs_apss_node,
  &route_0x4200000085L_xm_pcie3_1_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x420000001eL_xm_pcie3_1_xs_qdss_stm_node =
{
  0x420000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4200000085L_xm_pcie3_1_xs_sys_tcu_cfg_node =
{
  0x4200000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_xs_sys_tcu_cfg_list,
  &route_0x420000001eL_xm_pcie3_1_xs_qdss_stm_node,
  &route_0x42000000a6L_xm_pcie3_1_qxs_pimem_node
};
static ul_treeNodeType route_0x42000000a6L_xm_pcie3_1_qxs_pimem_node =
{
  0x42000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x42000000f3L_xm_pcie3_1_qns_llcc_node =
{
  0x42000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_1_qns_llcc_list,
  &route_0x420000001aL_xm_pcie3_1_qxs_imem_node,
  &route_0x440000001eL_xm_ufs_card_xs_qdss_stm_node
};
static ul_treeNodeType route_0x4400000000L_xm_ufs_card_ebi_node =
{
  0x4400000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4400000014L_xm_ufs_card_qhs_apss_node =
{
  0x4400000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_qhs_apss_list,
  &route_0x4400000000L_xm_ufs_card_ebi_node,
  &route_0x440000001aL_xm_ufs_card_qxs_imem_node
};
static ul_treeNodeType route_0x440000001aL_xm_ufs_card_qxs_imem_node =
{
  0x440000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x440000001eL_xm_ufs_card_xs_qdss_stm_node =
{
  0x440000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_xs_qdss_stm_list,
  &route_0x4400000014L_xm_ufs_card_qhs_apss_node,
  &route_0x4400000054L_xm_ufs_card_xs_pcie_0_node
};
static ul_treeNodeType route_0x4400000054L_xm_ufs_card_xs_pcie_0_node =
{
  0x4400000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_xs_pcie_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4400000055L_xm_ufs_card_xs_pcie_1_node =
{
  0x4400000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_xs_pcie_1_list,
  &route_0x3b00000014L_qxm_ipa_qhs_apss_node,
  &route_0x7800000000L_qxm_rot_ebi_node
};
static ul_treeNodeType route_0x4400000085L_xm_ufs_card_xs_sys_tcu_cfg_node =
{
  0x4400000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x44000000a4L_xm_ufs_card_xs_pcie_modem_node =
{
  0x44000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_xs_pcie_modem_list,
  &route_0x4400000085L_xm_ufs_card_xs_sys_tcu_cfg_node,
  NULL
};
static ul_treeNodeType route_0x44000000a6L_xm_ufs_card_qxs_pimem_node =
{
  0x44000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_qxs_pimem_list,
  &route_0x44000000a4L_xm_ufs_card_xs_pcie_modem_node,
  &route_0x44000000f3L_xm_ufs_card_qns_llcc_node
};
static ul_treeNodeType route_0x44000000f3L_xm_ufs_card_qns_llcc_node =
{
  0x44000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_card_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4500000000L_xm_usb3_1_ebi_node =
{
  0x4500000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_ebi_list,
  &route_0x44000000a6L_xm_ufs_card_qxs_pimem_node,
  &route_0x450000001eL_xm_usb3_1_xs_qdss_stm_node
};
static ul_treeNodeType route_0x4500000014L_xm_usb3_1_qhs_apss_node =
{
  0x4500000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x450000001aL_xm_usb3_1_qxs_imem_node =
{
  0x450000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_qxs_imem_list,
  &route_0x4500000014L_xm_usb3_1_qhs_apss_node,
  NULL
};
static ul_treeNodeType route_0x450000001eL_xm_usb3_1_xs_qdss_stm_node =
{
  0x450000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_xs_qdss_stm_list,
  &route_0x450000001aL_xm_usb3_1_qxs_imem_node,
  &route_0x4500000054L_xm_usb3_1_xs_pcie_0_node
};
static ul_treeNodeType route_0x4500000054L_xm_usb3_1_xs_pcie_0_node =
{
  0x4500000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_xs_pcie_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x4500000055L_xm_usb3_1_xs_pcie_1_node =
{
  0x4500000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_xs_pcie_1_list,
  &route_0x4500000000L_xm_usb3_1_ebi_node,
  &route_0x770000001aL_xm_pcie3_modem_qxs_imem_node
};
static ul_treeNodeType route_0x4500000085L_xm_usb3_1_xs_sys_tcu_cfg_node =
{
  0x4500000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x45000000a4L_xm_usb3_1_xs_pcie_modem_node =
{
  0x45000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_xs_pcie_modem_list,
  &route_0x4500000085L_xm_usb3_1_xs_sys_tcu_cfg_node,
  NULL
};
static ul_treeNodeType route_0x45000000a6L_xm_usb3_1_qxs_pimem_node =
{
  0x45000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_qxs_pimem_list,
  &route_0x45000000a4L_xm_usb3_1_xs_pcie_modem_node,
  &route_0x45000000f3L_xm_usb3_1_qns_llcc_node
};
static ul_treeNodeType route_0x45000000f3L_xm_usb3_1_qns_llcc_node =
{
  0x45000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_usb3_1_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x7100000000L_qxm_pimem_ebi_node =
{
  0x7100000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_pimem_ebi_list,
  &route_0x45000000a6L_xm_usb3_1_qxs_pimem_node,
  &route_0x7700000000L_xm_pcie3_modem_ebi_node
};
static ul_treeNodeType route_0x71000000f3L_qxm_pimem_qns_llcc_node =
{
  0x71000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_pimem_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x7700000000L_xm_pcie3_modem_ebi_node =
{
  0x7700000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_ebi_list,
  &route_0x71000000f3L_qxm_pimem_qns_llcc_node,
  &route_0x7700000014L_xm_pcie3_modem_qhs_apss_node
};
static ul_treeNodeType route_0x7700000014L_xm_pcie3_modem_qhs_apss_node =
{
  0x7700000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x770000001aL_xm_pcie3_modem_qxs_imem_node =
{
  0x770000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_qxs_imem_list,
  &route_0x7100000000L_qxm_pimem_ebi_node,
  &route_0x7700000085L_xm_pcie3_modem_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0x770000001eL_xm_pcie3_modem_xs_qdss_stm_node =
{
  0x770000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x7700000085L_xm_pcie3_modem_xs_sys_tcu_cfg_node =
{
  0x7700000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_xs_sys_tcu_cfg_list,
  &route_0x770000001eL_xm_pcie3_modem_xs_qdss_stm_node,
  &route_0x77000000a6L_xm_pcie3_modem_qxs_pimem_node
};
static ul_treeNodeType route_0x77000000a6L_xm_pcie3_modem_qxs_pimem_node =
{
  0x77000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_qxs_pimem_list,
  NULL,
  &route_0x77000000f3L_xm_pcie3_modem_qns_llcc_node
};
static ul_treeNodeType route_0x77000000f3L_xm_pcie3_modem_qns_llcc_node =
{
  0x77000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_pcie3_modem_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x7800000000L_qxm_rot_ebi_node =
{
  0x7800000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_ebi_list,
  &route_0x4500000055L_xm_usb3_1_xs_pcie_1_node,
  &route_0x8400000054L_qhm_qspi_xs_pcie_0_node
};
static ul_treeNodeType route_0x7800000014L_qxm_rot_qhs_apss_node =
{
  0x7800000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_qhs_apss_list,
  NULL,
  &route_0x780000001aL_qxm_rot_qxs_imem_node
};
static ul_treeNodeType route_0x780000001aL_qxm_rot_qxs_imem_node =
{
  0x780000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x780000001eL_qxm_rot_xs_qdss_stm_node =
{
  0x780000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_xs_qdss_stm_list,
  &route_0x7800000014L_qxm_rot_qhs_apss_node,
  &route_0x8400000000L_qhm_qspi_ebi_node
};
static ul_treeNodeType route_0x7800000085L_qxm_rot_xs_sys_tcu_cfg_node =
{
  0x7800000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x78000000a6L_qxm_rot_qxs_pimem_node =
{
  0x78000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_qxs_pimem_list,
  &route_0x7800000085L_qxm_rot_xs_sys_tcu_cfg_node,
  &route_0x78000000f3L_qxm_rot_qns_llcc_node
};
static ul_treeNodeType route_0x78000000f3L_qxm_rot_qns_llcc_node =
{
  0x78000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_rot_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x8400000000L_qhm_qspi_ebi_node =
{
  0x8400000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_ebi_list,
  &route_0x78000000a6L_qxm_rot_qxs_pimem_node,
  &route_0x840000001aL_qhm_qspi_qxs_imem_node
};
static ul_treeNodeType route_0x8400000014L_qhm_qspi_qhs_apss_node =
{
  0x8400000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x840000001aL_qhm_qspi_qxs_imem_node =
{
  0x840000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_qxs_imem_list,
  &route_0x8400000014L_qhm_qspi_qhs_apss_node,
  &route_0x840000001eL_qhm_qspi_xs_qdss_stm_node
};
static ul_treeNodeType route_0x840000001eL_qhm_qspi_xs_qdss_stm_node =
{
  0x840000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x8400000054L_qhm_qspi_xs_pcie_0_node =
{
  0x8400000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_xs_pcie_0_list,
  &route_0x780000001eL_qxm_rot_xs_qdss_stm_node,
  &route_0x84000000a4L_qhm_qspi_xs_pcie_modem_node
};
static ul_treeNodeType route_0x8400000055L_qhm_qspi_xs_pcie_1_node =
{
  0x8400000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_xs_pcie_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0x8400000085L_qhm_qspi_xs_sys_tcu_cfg_node =
{
  0x8400000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_xs_sys_tcu_cfg_list,
  &route_0x8400000055L_qhm_qspi_xs_pcie_1_node,
  NULL
};
static ul_treeNodeType route_0x84000000a4L_qhm_qspi_xs_pcie_modem_node =
{
  0x84000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_xs_pcie_modem_list,
  &route_0x8400000085L_qhm_qspi_xs_sys_tcu_cfg_node,
  &route_0x84000000a6L_qhm_qspi_qxs_pimem_node
};
static ul_treeNodeType route_0x84000000a6L_qhm_qspi_qxs_pimem_node =
{
  0x84000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_qxs_pimem_list,
  NULL,
  &route_0x84000000f3L_qhm_qspi_qns_llcc_node
};
static ul_treeNodeType route_0x84000000f3L_qhm_qspi_qns_llcc_node =
{
  0x84000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qspi_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xab00000000L_qnm_camnoc_hf_ebi_node =
{
  0xab00000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_hf_ebi_list,
  &route_0x4400000055L_xm_ufs_card_xs_pcie_1_node,
  &route_0xc30000000aL_qnm_npu_qhs_venus_cfg_node
};
static ul_treeNodeType route_0xab000000f3L_qnm_camnoc_hf_qns_llcc_node =
{
  0xab000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_hf_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xac00000000L_qnm_camnoc_sf_ebi_node =
{
  0xac00000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_ebi_list,
  &route_0xab000000f3L_qnm_camnoc_hf_qns_llcc_node,
  NULL
};
static ul_treeNodeType route_0xac00000014L_qnm_camnoc_sf_qhs_apss_node =
{
  0xac00000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_qhs_apss_list,
  &route_0xac00000000L_qnm_camnoc_sf_ebi_node,
  &route_0xac0000001aL_qnm_camnoc_sf_qxs_imem_node
};
static ul_treeNodeType route_0xac0000001aL_qnm_camnoc_sf_qxs_imem_node =
{
  0xac0000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xac0000001eL_qnm_camnoc_sf_xs_qdss_stm_node =
{
  0xac0000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_xs_qdss_stm_list,
  &route_0xac00000014L_qnm_camnoc_sf_qhs_apss_node,
  &route_0xac000000a6L_qnm_camnoc_sf_qxs_pimem_node
};
static ul_treeNodeType route_0xac00000085L_qnm_camnoc_sf_xs_sys_tcu_cfg_node =
{
  0xac00000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xac000000a6L_qnm_camnoc_sf_qxs_pimem_node =
{
  0xac000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_qxs_pimem_list,
  &route_0xac00000085L_qnm_camnoc_sf_xs_sys_tcu_cfg_node,
  &route_0xac000000f3L_qnm_camnoc_sf_qns_llcc_node
};
static ul_treeNodeType route_0xac000000f3L_qnm_camnoc_sf_qns_llcc_node =
{
  0xac000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_sf_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb100000000L_qnm_video_cvp_ebi_node =
{
  0xb100000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_ebi_list,
  &route_0xac0000001eL_qnm_camnoc_sf_xs_qdss_stm_node,
  &route_0xb20000001aL_xm_ufs_mem_qxs_imem_node
};
static ul_treeNodeType route_0xb100000014L_qnm_video_cvp_qhs_apss_node =
{
  0xb100000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_qhs_apss_list,
  NULL,
  &route_0xb10000001aL_qnm_video_cvp_qxs_imem_node
};
static ul_treeNodeType route_0xb10000001aL_qnm_video_cvp_qxs_imem_node =
{
  0xb10000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb10000001eL_qnm_video_cvp_xs_qdss_stm_node =
{
  0xb10000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_xs_qdss_stm_list,
  &route_0xb100000014L_qnm_video_cvp_qhs_apss_node,
  &route_0xb100000085L_qnm_video_cvp_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0xb100000085L_qnm_video_cvp_xs_sys_tcu_cfg_node =
{
  0xb100000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb1000000a6L_qnm_video_cvp_qxs_pimem_node =
{
  0xb1000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_qxs_pimem_list,
  &route_0xb10000001eL_qnm_video_cvp_xs_qdss_stm_node,
  &route_0xb200000000L_xm_ufs_mem_ebi_node
};
static ul_treeNodeType route_0xb1000000f3L_qnm_video_cvp_qns_llcc_node =
{
  0xb1000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_video_cvp_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb200000000L_xm_ufs_mem_ebi_node =
{
  0xb200000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_ebi_list,
  &route_0xb1000000f3L_qnm_video_cvp_qns_llcc_node,
  &route_0xb200000014L_xm_ufs_mem_qhs_apss_node
};
static ul_treeNodeType route_0xb200000014L_xm_ufs_mem_qhs_apss_node =
{
  0xb200000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb20000001aL_xm_ufs_mem_qxs_imem_node =
{
  0xb20000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_qxs_imem_list,
  &route_0xb1000000a6L_qnm_video_cvp_qxs_pimem_node,
  &route_0xb2000000a4L_xm_ufs_mem_xs_pcie_modem_node
};
static ul_treeNodeType route_0xb20000001eL_xm_ufs_mem_xs_qdss_stm_node =
{
  0xb20000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb200000054L_xm_ufs_mem_xs_pcie_0_node =
{
  0xb200000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_xs_pcie_0_list,
  &route_0xb20000001eL_xm_ufs_mem_xs_qdss_stm_node,
  &route_0xb200000055L_xm_ufs_mem_xs_pcie_1_node
};
static ul_treeNodeType route_0xb200000055L_xm_ufs_mem_xs_pcie_1_node =
{
  0xb200000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_xs_pcie_1_list,
  NULL,
  &route_0xb200000085L_xm_ufs_mem_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0xb200000085L_xm_ufs_mem_xs_sys_tcu_cfg_node =
{
  0xb200000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb2000000a4L_xm_ufs_mem_xs_pcie_modem_node =
{
  0xb2000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_xs_pcie_modem_list,
  &route_0xb200000054L_xm_ufs_mem_xs_pcie_0_node,
  &route_0xb2000000a6L_xm_ufs_mem_qxs_pimem_node
};
static ul_treeNodeType route_0xb2000000a6L_xm_ufs_mem_qxs_pimem_node =
{
  0xb2000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_qxs_pimem_list,
  NULL,
  &route_0xb2000000f3L_xm_ufs_mem_qns_llcc_node
};
static ul_treeNodeType route_0xb2000000f3L_xm_ufs_mem_qns_llcc_node =
{
  0xb2000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_ufs_mem_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb300000000L_xm_gic_ebi_node =
{
  0xb300000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_gic_ebi_list,
  &route_0xb100000000L_qnm_video_cvp_ebi_node,
  &route_0xc200000000L_qhm_qup0_ebi_node
};
static ul_treeNodeType route_0xb3000000f3L_xm_gic_qns_llcc_node =
{
  0xb3000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_xm_gic_qns_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xb400000000L_llcc_mc_ebi_node =
{
  0xb400000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_llcc_mc_ebi_list,
  &route_0xb3000000f3L_xm_gic_qns_llcc_node,
  &route_0xba00000109L_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_node
};
static ul_treeNodeType route_0xb900000109L_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_node =
{
  0xb900000109ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xba00000109L_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_node =
{
  0xba00000109ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_camnoc_hf1_uncomp_qns_camnoc_uncomp_list,
  &route_0xb900000109L_qxm_camnoc_hf0_uncomp_qns_camnoc_uncomp_node,
  &route_0xbb00000109L_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_node
};
static ul_treeNodeType route_0xbb00000109L_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_node =
{
  0xbb00000109ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qxm_camnoc_sf_uncomp_qns_camnoc_uncomp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc200000000L_qhm_qup0_ebi_node =
{
  0xc200000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_ebi_list,
  &route_0xb400000000L_llcc_mc_ebi_node,
  &route_0xc2000000a4L_qhm_qup0_xs_pcie_modem_node
};
static ul_treeNodeType route_0xc200000014L_qhm_qup0_qhs_apss_node =
{
  0xc200000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc20000001aL_qhm_qup0_qxs_imem_node =
{
  0xc20000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_qxs_imem_list,
  &route_0xc200000014L_qhm_qup0_qhs_apss_node,
  &route_0xc20000001eL_qhm_qup0_xs_qdss_stm_node
};
static ul_treeNodeType route_0xc20000001eL_qhm_qup0_xs_qdss_stm_node =
{
  0xc20000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc200000054L_qhm_qup0_xs_pcie_0_node =
{
  0xc200000054ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_xs_pcie_0_list,
  &route_0xc20000001aL_qhm_qup0_qxs_imem_node,
  &route_0xc200000055L_qhm_qup0_xs_pcie_1_node
};
static ul_treeNodeType route_0xc200000055L_qhm_qup0_xs_pcie_1_node =
{
  0xc200000055ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_xs_pcie_1_list,
  NULL,
  &route_0xc200000085L_qhm_qup0_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0xc200000085L_qhm_qup0_xs_sys_tcu_cfg_node =
{
  0xc200000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc2000000a4L_qhm_qup0_xs_pcie_modem_node =
{
  0xc2000000a4ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_xs_pcie_modem_list,
  &route_0xc200000054L_qhm_qup0_xs_pcie_0_node,
  &route_0xc2000000f3L_qhm_qup0_qns_llcc_node
};
static ul_treeNodeType route_0xc2000000a6L_qhm_qup0_qxs_pimem_node =
{
  0xc2000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc2000000f3L_qhm_qup0_qns_llcc_node =
{
  0xc2000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qhm_qup0_qns_llcc_list,
  &route_0xc2000000a6L_qhm_qup0_qxs_pimem_node,
  &route_0xc300000003L_qnm_npu_qhs_camera_cfg_node
};
static ul_treeNodeType route_0xc300000000L_qnm_npu_ebi_node =
{
  0xc300000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000003L_qnm_npu_qhs_camera_cfg_node =
{
  0xc300000003ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_camera_cfg_list,
  &route_0xc300000000L_qnm_npu_ebi_node,
  &route_0xc300000004L_qnm_npu_qhs_display_cfg_node
};
static ul_treeNodeType route_0xc300000004L_qnm_npu_qhs_display_cfg_node =
{
  0xc300000004ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_display_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000000aL_qnm_npu_qhs_venus_cfg_node =
{
  0xc30000000aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_venus_cfg_list,
  &route_0xb300000000L_xm_gic_ebi_node,
  &route_0xc30000002cL_qnm_npu_qhs_prng_node
};
static ul_treeNodeType route_0xc30000000bL_qnm_npu_qhs_gpuss_cfg_node =
{
  0xc30000000bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_gpuss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000011L_qnm_npu_srvc_mnoc_node =
{
  0xc300000011ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_mnoc_list,
  &route_0xc30000000bL_qnm_npu_qhs_gpuss_cfg_node,
  &route_0xc300000014L_qnm_npu_qhs_apss_node
};
static ul_treeNodeType route_0xc300000014L_qnm_npu_qhs_apss_node =
{
  0xc300000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000015L_qnm_npu_qhs_lpass_cfg_node =
{
  0xc300000015ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_lpass_cfg_list,
  &route_0xc300000011L_qnm_npu_srvc_mnoc_node,
  &route_0xc30000001aL_qnm_npu_qxs_imem_node
};
static ul_treeNodeType route_0xc300000016L_qnm_npu_qhs_usb3_0_node =
{
  0xc300000016ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_usb3_0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000001aL_qnm_npu_qxs_imem_node =
{
  0xc30000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qxs_imem_list,
  &route_0xc300000016L_qnm_npu_qhs_usb3_0_node,
  NULL
};
static ul_treeNodeType route_0xc30000001dL_qnm_npu_srvc_snoc_node =
{
  0xc30000001dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_snoc_list,
  &route_0xc300000015L_qnm_npu_qhs_lpass_cfg_node,
  &route_0xc300000025L_qnm_npu_qhs_qup2_node
};
static ul_treeNodeType route_0xc30000001eL_qnm_npu_xs_qdss_stm_node =
{
  0xc30000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000021L_qnm_npu_qhs_sdc2_node =
{
  0xc300000021ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_sdc2_list,
  &route_0xc30000001eL_qnm_npu_xs_qdss_stm_node,
  &route_0xc300000022L_qnm_npu_qhs_sdc4_node
};
static ul_treeNodeType route_0xc300000022L_qnm_npu_qhs_sdc4_node =
{
  0xc300000022ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_sdc4_list,
  NULL,
  &route_0xc300000023L_qnm_npu_qhs_tsif_node
};
static ul_treeNodeType route_0xc300000023L_qnm_npu_qhs_tsif_node =
{
  0xc300000023ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tsif_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000025L_qnm_npu_qhs_qup2_node =
{
  0xc300000025ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_qup2_list,
  &route_0xc300000021L_qnm_npu_qhs_sdc2_node,
  &route_0xc300000029L_qnm_npu_qhs_pdm_node
};
static ul_treeNodeType route_0xc300000027L_qnm_npu_qhs_qup1_node =
{
  0xc300000027ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_qup1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000029L_qnm_npu_qhs_pdm_node =
{
  0xc300000029ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_pdm_list,
  &route_0xc300000027L_qnm_npu_qhs_qup1_node,
  NULL
};
static ul_treeNodeType route_0xc30000002cL_qnm_npu_qhs_prng_node =
{
  0xc30000002cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_prng_list,
  &route_0xc30000001dL_qnm_npu_srvc_snoc_node,
  &route_0xc3000000a6L_qnm_npu_qxs_pimem_node
};
static ul_treeNodeType route_0xc30000002fL_qnm_npu_qhs_clk_ctl_node =
{
  0xc30000002fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_clk_ctl_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000032L_qnm_npu_qhs_tcsr_node =
{
  0xc300000032ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tcsr_list,
  &route_0xc30000002fL_qnm_npu_qhs_clk_ctl_node,
  &route_0xc300000034L_qnm_npu_qhs_crypto0_cfg_node
};
static ul_treeNodeType route_0xc300000034L_qnm_npu_qhs_crypto0_cfg_node =
{
  0xc300000034ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_crypto0_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000036L_qnm_npu_qhs_imem_cfg_node =
{
  0xc300000036ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_imem_cfg_list,
  &route_0xc300000032L_qnm_npu_qhs_tcsr_node,
  &route_0xc30000003fL_qnm_npu_qhs_qdss_cfg_node
};
static ul_treeNodeType route_0xc30000003fL_qnm_npu_qhs_qdss_cfg_node =
{
  0xc30000003fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_qdss_cfg_list,
  NULL,
  &route_0xc300000040L_qnm_npu_qhs_cpr_cx_node
};
static ul_treeNodeType route_0xc300000040L_qnm_npu_qhs_cpr_cx_node =
{
  0xc300000040ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cpr_cx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000004cL_qnm_npu_srvc_cnoc_node =
{
  0xc30000004cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_cnoc_list,
  &route_0xc300000036L_qnm_npu_qhs_imem_cfg_node,
  &route_0xc300000060L_qnm_npu_qhs_cpr_mx_node
};
static ul_treeNodeType route_0xc300000053L_qnm_npu_qhs_usb3_1_node =
{
  0xc300000053ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_usb3_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000058L_qnm_npu_qhs_pcie0_cfg_node =
{
  0xc300000058ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_pcie0_cfg_list,
  &route_0xc300000053L_qnm_npu_qhs_usb3_1_node,
  &route_0xc30000005cL_qnm_npu_qhs_ufs_card_cfg_node
};
static ul_treeNodeType route_0xc300000059L_qnm_npu_qhs_pcie1_cfg_node =
{
  0xc300000059ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_pcie1_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000005cL_qnm_npu_qhs_ufs_card_cfg_node =
{
  0xc30000005cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ufs_card_cfg_list,
  &route_0xc300000059L_qnm_npu_qhs_pcie1_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc300000060L_qnm_npu_qhs_cpr_mx_node =
{
  0xc300000060ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cpr_mx_list,
  &route_0xc300000058L_qnm_npu_qhs_pcie0_cfg_node,
  &route_0xc30000009bL_qnm_npu_qhs_dcc_cfg_node
};
static ul_treeNodeType route_0xc300000085L_qnm_npu_xs_sys_tcu_cfg_node =
{
  0xc300000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000009bL_qnm_npu_qhs_dcc_cfg_node =
{
  0xc30000009bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_dcc_cfg_list,
  &route_0xc300000085L_qnm_npu_xs_sys_tcu_cfg_node,
  &route_0xc3000000a5L_qnm_npu_qhs_pcie_modem_cfg_node
};
static ul_treeNodeType route_0xc3000000a5L_qnm_npu_qhs_pcie_modem_cfg_node =
{
  0xc3000000a5ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_pcie_modem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000a6L_qnm_npu_qxs_pimem_node =
{
  0xc3000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qxs_pimem_list,
  &route_0xc30000004cL_qnm_npu_srvc_cnoc_node,
  &route_0xc3000000beL_qnm_npu_qhs_qspi_node
};
static ul_treeNodeType route_0xc3000000a7L_qnm_npu_qhs_pimem_cfg_node =
{
  0xc3000000a7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_pimem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000b7L_qnm_npu_qhs_ipa_node =
{
  0xc3000000b7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ipa_list,
  &route_0xc3000000a7L_qnm_npu_qhs_pimem_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc3000000beL_qnm_npu_qhs_qspi_node =
{
  0xc3000000beULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_qspi_list,
  &route_0xc3000000b7L_qnm_npu_qhs_ipa_node,
  &route_0xc3000000d7L_qnm_npu_qhs_tlmm2_node
};
static ul_treeNodeType route_0xc3000000d6L_qnm_npu_qhs_tlmm0_node =
{
  0xc3000000d6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tlmm0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000d7L_qnm_npu_qhs_tlmm2_node =
{
  0xc3000000d7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tlmm2_list,
  &route_0xc3000000d6L_qnm_npu_qhs_tlmm0_node,
  &route_0xc3000000dbL_qnm_npu_qhs_aoss_node
};
static ul_treeNodeType route_0xc3000000d8L_qnm_npu_qhs_tlmm1_node =
{
  0xc3000000d8ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tlmm1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000dbL_qnm_npu_qhs_aoss_node =
{
  0xc3000000dbULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_aoss_list,
  &route_0xc3000000d8L_qnm_npu_qhs_tlmm1_node,
  NULL
};
static ul_treeNodeType route_0xc3000000dcL_qnm_npu_qhs_compute_dsp_node =
{
  0xc3000000dcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_compute_dsp_list,
  &route_0xab00000000L_qnm_camnoc_hf_ebi_node,
  &route_0xc50000001eL_alm_sys_tcu_xs_qdss_stm_node
};
static ul_treeNodeType route_0xc3000000e0L_qnm_npu_qhs_llcc_node =
{
  0xc3000000e0ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000ecL_qnm_npu_qhs_ufs_mem_cfg_node =
{
  0xc3000000ecULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ufs_mem_cfg_list,
  &route_0xc3000000e0L_qnm_npu_qhs_llcc_node,
  &route_0xc3000000edL_qnm_npu_qhs_vsense_ctrl_cfg_node
};
static ul_treeNodeType route_0xc3000000edL_qnm_npu_qhs_vsense_ctrl_cfg_node =
{
  0xc3000000edULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc3000000f3L_qnm_npu_qns_llcc_node =
{
  0xc3000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qns_llcc_list,
  &route_0xc3000000ecL_qnm_npu_qhs_ufs_mem_cfg_node,
  &route_0xc3000000fcL_qnm_npu_srvc_aggre1_noc_node
};
static ul_treeNodeType route_0xc3000000fcL_qnm_npu_srvc_aggre1_noc_node =
{
  0xc3000000fcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_aggre1_noc_list,
  NULL,
  &route_0xc3000000fdL_qnm_npu_srvc_aggre2_noc_node
};
static ul_treeNodeType route_0xc3000000fdL_qnm_npu_srvc_aggre2_noc_node =
{
  0xc3000000fdULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_aggre2_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000102L_qnm_npu_srvc_sys_gemnoc_node =
{
  0xc300000102ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_sys_gemnoc_list,
  &route_0xc3000000f3L_qnm_npu_qns_llcc_node,
  &route_0xc30000011cL_qnm_npu_qhs_ahb2phy0_node
};
static ul_treeNodeType route_0xc30000011cL_qnm_npu_qhs_ahb2phy0_node =
{
  0xc30000011cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ahb2phy0_list,
  NULL,
  &route_0xc30000011eL_qnm_npu_qhs_cpr_mmcx_node
};
static ul_treeNodeType route_0xc30000011eL_qnm_npu_qhs_cpr_mmcx_node =
{
  0xc30000011eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cpr_mmcx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000125L_qnm_npu_qhs_qup0_node =
{
  0xc300000125ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_qup0_list,
  &route_0xc300000102L_qnm_npu_srvc_sys_gemnoc_node,
  &route_0xc300000145L_qnm_npu_qhs_cal_dp0_node
};
static ul_treeNodeType route_0xc300000127L_qnm_npu_srvc_even_gemnoc_node =
{
  0xc300000127ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_even_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000013aL_qnm_npu_srvc_odd_gemnoc_node =
{
  0xc30000013aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_odd_gemnoc_list,
  &route_0xc300000127L_qnm_npu_srvc_even_gemnoc_node,
  &route_0xc300000140L_qnm_npu_qhs_ahb2phy1_node
};
static ul_treeNodeType route_0xc300000140L_qnm_npu_qhs_ahb2phy1_node =
{
  0xc300000140ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ahb2phy1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000142L_qnm_npu_qhs_cx_rdpm_node =
{
  0xc300000142ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cx_rdpm_list,
  &route_0xc30000013aL_qnm_npu_srvc_odd_gemnoc_node,
  &route_0xc300000144L_qnm_npu_qhs_isense_node
};
static ul_treeNodeType route_0xc300000143L_qnm_npu_qhs_ipc_router_node =
{
  0xc300000143ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_ipc_router_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000144L_qnm_npu_qhs_isense_node =
{
  0xc300000144ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_isense_list,
  &route_0xc300000143L_qnm_npu_qhs_ipc_router_node,
  NULL
};
static ul_treeNodeType route_0xc300000145L_qnm_npu_qhs_cal_dp0_node =
{
  0xc300000145ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cal_dp0_list,
  &route_0xc300000142L_qnm_npu_qhs_cx_rdpm_node,
  &route_0xc30000014aL_qnm_npu_qhs_dma_bwmon_node
};
static ul_treeNodeType route_0xc300000146L_qnm_npu_qhs_cal_dp1_node =
{
  0xc300000146ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cal_dp1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc300000148L_qnm_npu_qhs_cp_node =
{
  0xc300000148ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_cp_list,
  &route_0xc300000146L_qnm_npu_qhs_cal_dp1_node,
  &route_0xc300000149L_qnm_npu_qhs_dpm_node
};
static ul_treeNodeType route_0xc300000149L_qnm_npu_qhs_dpm_node =
{
  0xc300000149ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_dpm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000014aL_qnm_npu_qhs_dma_bwmon_node =
{
  0xc30000014aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_dma_bwmon_list,
  &route_0xc300000148L_qnm_npu_qhs_cp_node,
  &route_0xc30000014cL_qnm_npu_qhs_tcm_node
};
static ul_treeNodeType route_0xc30000014bL_qnm_npu_qhs_llm_node =
{
  0xc30000014bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_llm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc30000014cL_qnm_npu_qhs_tcm_node =
{
  0xc30000014cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_qhs_tcm_list,
  &route_0xc30000014bL_qnm_npu_qhs_llm_node,
  &route_0xc30000014dL_qnm_npu_srvc_noc_node
};
static ul_treeNodeType route_0xc30000014dL_qnm_npu_srvc_noc_node =
{
  0xc30000014dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_npu_srvc_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000000L_alm_gpu_tcu_ebi_node =
{
  0xc400000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_ebi_list,
  &route_0xc300000125L_qnm_npu_qhs_qup0_node,
  &route_0xc400000034L_alm_gpu_tcu_qhs_crypto0_cfg_node
};
static ul_treeNodeType route_0xc400000003L_alm_gpu_tcu_qhs_camera_cfg_node =
{
  0xc400000003ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_camera_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000004L_alm_gpu_tcu_qhs_display_cfg_node =
{
  0xc400000004ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_display_cfg_list,
  &route_0xc400000003L_alm_gpu_tcu_qhs_camera_cfg_node,
  &route_0xc40000000aL_alm_gpu_tcu_qhs_venus_cfg_node
};
static ul_treeNodeType route_0xc40000000aL_alm_gpu_tcu_qhs_venus_cfg_node =
{
  0xc40000000aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_venus_cfg_list,
  NULL,
  &route_0xc40000000bL_alm_gpu_tcu_qhs_gpuss_cfg_node
};
static ul_treeNodeType route_0xc40000000bL_alm_gpu_tcu_qhs_gpuss_cfg_node =
{
  0xc40000000bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_gpuss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000011L_alm_gpu_tcu_srvc_mnoc_node =
{
  0xc400000011ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_mnoc_list,
  &route_0xc400000004L_alm_gpu_tcu_qhs_display_cfg_node,
  &route_0xc400000016L_alm_gpu_tcu_qhs_usb3_0_node
};
static ul_treeNodeType route_0xc400000014L_alm_gpu_tcu_qhs_apss_node =
{
  0xc400000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_apss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000015L_alm_gpu_tcu_qhs_lpass_cfg_node =
{
  0xc400000015ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_lpass_cfg_list,
  &route_0xc400000014L_alm_gpu_tcu_qhs_apss_node,
  NULL
};
static ul_treeNodeType route_0xc400000016L_alm_gpu_tcu_qhs_usb3_0_node =
{
  0xc400000016ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_usb3_0_list,
  &route_0xc400000015L_alm_gpu_tcu_qhs_lpass_cfg_node,
  &route_0xc40000001dL_alm_gpu_tcu_srvc_snoc_node
};
static ul_treeNodeType route_0xc40000001aL_alm_gpu_tcu_qxs_imem_node =
{
  0xc40000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000001dL_alm_gpu_tcu_srvc_snoc_node =
{
  0xc40000001dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_snoc_list,
  &route_0xc40000001aL_alm_gpu_tcu_qxs_imem_node,
  &route_0xc40000001eL_alm_gpu_tcu_xs_qdss_stm_node
};
static ul_treeNodeType route_0xc40000001eL_alm_gpu_tcu_xs_qdss_stm_node =
{
  0xc40000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_xs_qdss_stm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000021L_alm_gpu_tcu_qhs_sdc2_node =
{
  0xc400000021ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_sdc2_list,
  &route_0xc400000011L_alm_gpu_tcu_srvc_mnoc_node,
  &route_0xc400000029L_alm_gpu_tcu_qhs_pdm_node
};
static ul_treeNodeType route_0xc400000022L_alm_gpu_tcu_qhs_sdc4_node =
{
  0xc400000022ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_sdc4_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000023L_alm_gpu_tcu_qhs_tsif_node =
{
  0xc400000023ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tsif_list,
  &route_0xc400000022L_alm_gpu_tcu_qhs_sdc4_node,
  &route_0xc400000025L_alm_gpu_tcu_qhs_qup2_node
};
static ul_treeNodeType route_0xc400000025L_alm_gpu_tcu_qhs_qup2_node =
{
  0xc400000025ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_qup2_list,
  NULL,
  &route_0xc400000027L_alm_gpu_tcu_qhs_qup1_node
};
static ul_treeNodeType route_0xc400000027L_alm_gpu_tcu_qhs_qup1_node =
{
  0xc400000027ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_qup1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000029L_alm_gpu_tcu_qhs_pdm_node =
{
  0xc400000029ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_pdm_list,
  &route_0xc400000023L_alm_gpu_tcu_qhs_tsif_node,
  &route_0xc40000002fL_alm_gpu_tcu_qhs_clk_ctl_node
};
static ul_treeNodeType route_0xc40000002cL_alm_gpu_tcu_qhs_prng_node =
{
  0xc40000002cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_prng_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000002fL_alm_gpu_tcu_qhs_clk_ctl_node =
{
  0xc40000002fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_clk_ctl_list,
  &route_0xc40000002cL_alm_gpu_tcu_qhs_prng_node,
  &route_0xc400000032L_alm_gpu_tcu_qhs_tcsr_node
};
static ul_treeNodeType route_0xc400000032L_alm_gpu_tcu_qhs_tcsr_node =
{
  0xc400000032ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tcsr_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000034L_alm_gpu_tcu_qhs_crypto0_cfg_node =
{
  0xc400000034ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_crypto0_cfg_list,
  &route_0xc400000021L_alm_gpu_tcu_qhs_sdc2_node,
  &route_0xc400000058L_alm_gpu_tcu_qhs_pcie0_cfg_node
};
static ul_treeNodeType route_0xc400000036L_alm_gpu_tcu_qhs_imem_cfg_node =
{
  0xc400000036ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_imem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000003fL_alm_gpu_tcu_qhs_qdss_cfg_node =
{
  0xc40000003fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_qdss_cfg_list,
  &route_0xc400000036L_alm_gpu_tcu_qhs_imem_cfg_node,
  &route_0xc400000040L_alm_gpu_tcu_qhs_cpr_cx_node
};
static ul_treeNodeType route_0xc400000040L_alm_gpu_tcu_qhs_cpr_cx_node =
{
  0xc400000040ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cpr_cx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000004cL_alm_gpu_tcu_srvc_cnoc_node =
{
  0xc40000004cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_cnoc_list,
  &route_0xc40000003fL_alm_gpu_tcu_qhs_qdss_cfg_node,
  &route_0xc400000053L_alm_gpu_tcu_qhs_usb3_1_node
};
static ul_treeNodeType route_0xc400000053L_alm_gpu_tcu_qhs_usb3_1_node =
{
  0xc400000053ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_usb3_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000058L_alm_gpu_tcu_qhs_pcie0_cfg_node =
{
  0xc400000058ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_pcie0_cfg_list,
  &route_0xc40000004cL_alm_gpu_tcu_srvc_cnoc_node,
  &route_0xc40000009bL_alm_gpu_tcu_qhs_dcc_cfg_node
};
static ul_treeNodeType route_0xc400000059L_alm_gpu_tcu_qhs_pcie1_cfg_node =
{
  0xc400000059ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_pcie1_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000005cL_alm_gpu_tcu_qhs_ufs_card_cfg_node =
{
  0xc40000005cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ufs_card_cfg_list,
  &route_0xc400000059L_alm_gpu_tcu_qhs_pcie1_cfg_node,
  &route_0xc400000060L_alm_gpu_tcu_qhs_cpr_mx_node
};
static ul_treeNodeType route_0xc400000060L_alm_gpu_tcu_qhs_cpr_mx_node =
{
  0xc400000060ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cpr_mx_list,
  NULL,
  &route_0xc400000085L_alm_gpu_tcu_xs_sys_tcu_cfg_node
};
static ul_treeNodeType route_0xc400000085L_alm_gpu_tcu_xs_sys_tcu_cfg_node =
{
  0xc400000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000009bL_alm_gpu_tcu_qhs_dcc_cfg_node =
{
  0xc40000009bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_dcc_cfg_list,
  &route_0xc40000005cL_alm_gpu_tcu_qhs_ufs_card_cfg_node,
  &route_0xc4000000a5L_alm_gpu_tcu_qhs_pcie_modem_cfg_node
};
static ul_treeNodeType route_0xc4000000a5L_alm_gpu_tcu_qhs_pcie_modem_cfg_node =
{
  0xc4000000a5ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_pcie_modem_cfg_list,
  NULL,
  &route_0xc4000000a6L_alm_gpu_tcu_qxs_pimem_node
};
static ul_treeNodeType route_0xc4000000a6L_alm_gpu_tcu_qxs_pimem_node =
{
  0xc4000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qxs_pimem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000a7L_alm_gpu_tcu_qhs_pimem_cfg_node =
{
  0xc4000000a7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_pimem_cfg_list,
  &route_0xc400000000L_alm_gpu_tcu_ebi_node,
  &route_0xc400000146L_alm_gpu_tcu_qhs_cal_dp1_node
};
static ul_treeNodeType route_0xc4000000b7L_alm_gpu_tcu_qhs_ipa_node =
{
  0xc4000000b7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ipa_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000beL_alm_gpu_tcu_qhs_qspi_node =
{
  0xc4000000beULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_qspi_list,
  &route_0xc4000000b7L_alm_gpu_tcu_qhs_ipa_node,
  &route_0xc4000000d6L_alm_gpu_tcu_qhs_tlmm0_node
};
static ul_treeNodeType route_0xc4000000d6L_alm_gpu_tcu_qhs_tlmm0_node =
{
  0xc4000000d6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tlmm0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000d7L_alm_gpu_tcu_qhs_tlmm2_node =
{
  0xc4000000d7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tlmm2_list,
  &route_0xc4000000beL_alm_gpu_tcu_qhs_qspi_node,
  &route_0xc4000000d8L_alm_gpu_tcu_qhs_tlmm1_node
};
static ul_treeNodeType route_0xc4000000d8L_alm_gpu_tcu_qhs_tlmm1_node =
{
  0xc4000000d8ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tlmm1_list,
  NULL,
  &route_0xc4000000dbL_alm_gpu_tcu_qhs_aoss_node
};
static ul_treeNodeType route_0xc4000000dbL_alm_gpu_tcu_qhs_aoss_node =
{
  0xc4000000dbULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_aoss_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000dcL_alm_gpu_tcu_qhs_compute_dsp_node =
{
  0xc4000000dcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_compute_dsp_list,
  &route_0xc4000000d7L_alm_gpu_tcu_qhs_tlmm2_node,
  &route_0xc4000000ecL_alm_gpu_tcu_qhs_ufs_mem_cfg_node
};
static ul_treeNodeType route_0xc4000000e0L_alm_gpu_tcu_qhs_llcc_node =
{
  0xc4000000e0ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_llcc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000ecL_alm_gpu_tcu_qhs_ufs_mem_cfg_node =
{
  0xc4000000ecULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ufs_mem_cfg_list,
  &route_0xc4000000e0L_alm_gpu_tcu_qhs_llcc_node,
  &route_0xc4000000f3L_alm_gpu_tcu_qns_llcc_node
};
static ul_treeNodeType route_0xc4000000edL_alm_gpu_tcu_qhs_vsense_ctrl_cfg_node =
{
  0xc4000000edULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc4000000f3L_alm_gpu_tcu_qns_llcc_node =
{
  0xc4000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qns_llcc_list,
  &route_0xc4000000edL_alm_gpu_tcu_qhs_vsense_ctrl_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc4000000fcL_alm_gpu_tcu_srvc_aggre1_noc_node =
{
  0xc4000000fcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_aggre1_noc_list,
  &route_0xc4000000dcL_alm_gpu_tcu_qhs_compute_dsp_node,
  &route_0xc400000125L_alm_gpu_tcu_qhs_qup0_node
};
static ul_treeNodeType route_0xc4000000fdL_alm_gpu_tcu_srvc_aggre2_noc_node =
{
  0xc4000000fdULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_aggre2_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000102L_alm_gpu_tcu_srvc_sys_gemnoc_node =
{
  0xc400000102ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_sys_gemnoc_list,
  &route_0xc4000000fdL_alm_gpu_tcu_srvc_aggre2_noc_node,
  NULL
};
static ul_treeNodeType route_0xc40000011cL_alm_gpu_tcu_qhs_ahb2phy0_node =
{
  0xc40000011cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ahb2phy0_list,
  &route_0xc400000102L_alm_gpu_tcu_srvc_sys_gemnoc_node,
  &route_0xc40000011eL_alm_gpu_tcu_qhs_cpr_mmcx_node
};
static ul_treeNodeType route_0xc40000011eL_alm_gpu_tcu_qhs_cpr_mmcx_node =
{
  0xc40000011eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cpr_mmcx_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000125L_alm_gpu_tcu_qhs_qup0_node =
{
  0xc400000125ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_qup0_list,
  &route_0xc40000011cL_alm_gpu_tcu_qhs_ahb2phy0_node,
  &route_0xc400000142L_alm_gpu_tcu_qhs_cx_rdpm_node
};
static ul_treeNodeType route_0xc400000127L_alm_gpu_tcu_srvc_even_gemnoc_node =
{
  0xc400000127ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_even_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000013aL_alm_gpu_tcu_srvc_odd_gemnoc_node =
{
  0xc40000013aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_odd_gemnoc_list,
  &route_0xc400000127L_alm_gpu_tcu_srvc_even_gemnoc_node,
  &route_0xc400000140L_alm_gpu_tcu_qhs_ahb2phy1_node
};
static ul_treeNodeType route_0xc400000140L_alm_gpu_tcu_qhs_ahb2phy1_node =
{
  0xc400000140ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ahb2phy1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000142L_alm_gpu_tcu_qhs_cx_rdpm_node =
{
  0xc400000142ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cx_rdpm_list,
  &route_0xc40000013aL_alm_gpu_tcu_srvc_odd_gemnoc_node,
  &route_0xc400000144L_alm_gpu_tcu_qhs_isense_node
};
static ul_treeNodeType route_0xc400000143L_alm_gpu_tcu_qhs_ipc_router_node =
{
  0xc400000143ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_ipc_router_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000144L_alm_gpu_tcu_qhs_isense_node =
{
  0xc400000144ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_isense_list,
  &route_0xc400000143L_alm_gpu_tcu_qhs_ipc_router_node,
  &route_0xc400000145L_alm_gpu_tcu_qhs_cal_dp0_node
};
static ul_treeNodeType route_0xc400000145L_alm_gpu_tcu_qhs_cal_dp0_node =
{
  0xc400000145ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cal_dp0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000146L_alm_gpu_tcu_qhs_cal_dp1_node =
{
  0xc400000146ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cal_dp1_list,
  &route_0xc4000000fcL_alm_gpu_tcu_srvc_aggre1_noc_node,
  &route_0xc500000003L_alm_sys_tcu_qhs_camera_cfg_node
};
static ul_treeNodeType route_0xc400000148L_alm_gpu_tcu_qhs_cp_node =
{
  0xc400000148ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_cp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc400000149L_alm_gpu_tcu_qhs_dpm_node =
{
  0xc400000149ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_dpm_list,
  &route_0xc400000148L_alm_gpu_tcu_qhs_cp_node,
  &route_0xc40000014aL_alm_gpu_tcu_qhs_dma_bwmon_node
};
static ul_treeNodeType route_0xc40000014aL_alm_gpu_tcu_qhs_dma_bwmon_node =
{
  0xc40000014aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_dma_bwmon_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000014bL_alm_gpu_tcu_qhs_llm_node =
{
  0xc40000014bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_llm_list,
  &route_0xc400000149L_alm_gpu_tcu_qhs_dpm_node,
  &route_0xc40000014dL_alm_gpu_tcu_srvc_noc_node
};
static ul_treeNodeType route_0xc40000014cL_alm_gpu_tcu_qhs_tcm_node =
{
  0xc40000014cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_qhs_tcm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc40000014dL_alm_gpu_tcu_srvc_noc_node =
{
  0xc40000014dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_gpu_tcu_srvc_noc_list,
  &route_0xc40000014cL_alm_gpu_tcu_qhs_tcm_node,
  &route_0xc500000000L_alm_sys_tcu_ebi_node
};
static ul_treeNodeType route_0xc500000000L_alm_sys_tcu_ebi_node =
{
  0xc500000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000003L_alm_sys_tcu_qhs_camera_cfg_node =
{
  0xc500000003ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_camera_cfg_list,
  &route_0xc40000014bL_alm_gpu_tcu_qhs_llm_node,
  &route_0xc500000014L_alm_sys_tcu_qhs_apss_node
};
static ul_treeNodeType route_0xc500000004L_alm_sys_tcu_qhs_display_cfg_node =
{
  0xc500000004ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_display_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000000aL_alm_sys_tcu_qhs_venus_cfg_node =
{
  0xc50000000aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_venus_cfg_list,
  &route_0xc500000004L_alm_sys_tcu_qhs_display_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc50000000bL_alm_sys_tcu_qhs_gpuss_cfg_node =
{
  0xc50000000bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_gpuss_cfg_list,
  &route_0xc50000000aL_alm_sys_tcu_qhs_venus_cfg_node,
  &route_0xc500000011L_alm_sys_tcu_srvc_mnoc_node
};
static ul_treeNodeType route_0xc500000011L_alm_sys_tcu_srvc_mnoc_node =
{
  0xc500000011ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_mnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000014L_alm_sys_tcu_qhs_apss_node =
{
  0xc500000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_apss_list,
  &route_0xc50000000bL_alm_sys_tcu_qhs_gpuss_cfg_node,
  &route_0xc500000016L_alm_sys_tcu_qhs_usb3_0_node
};
static ul_treeNodeType route_0xc500000015L_alm_sys_tcu_qhs_lpass_cfg_node =
{
  0xc500000015ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_lpass_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000016L_alm_sys_tcu_qhs_usb3_0_node =
{
  0xc500000016ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_usb3_0_list,
  &route_0xc500000015L_alm_sys_tcu_qhs_lpass_cfg_node,
  &route_0xc50000001dL_alm_sys_tcu_srvc_snoc_node
};
static ul_treeNodeType route_0xc50000001aL_alm_sys_tcu_qxs_imem_node =
{
  0xc50000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000001dL_alm_sys_tcu_srvc_snoc_node =
{
  0xc50000001dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_snoc_list,
  &route_0xc50000001aL_alm_sys_tcu_qxs_imem_node,
  NULL
};
static ul_treeNodeType route_0xc50000001eL_alm_sys_tcu_xs_qdss_stm_node =
{
  0xc50000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_xs_qdss_stm_list,
  &route_0xc4000000a7L_alm_gpu_tcu_qhs_pimem_cfg_node,
  &route_0xc5000000fcL_alm_sys_tcu_srvc_aggre1_noc_node
};
static ul_treeNodeType route_0xc500000021L_alm_sys_tcu_qhs_sdc2_node =
{
  0xc500000021ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_sdc2_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000022L_alm_sys_tcu_qhs_sdc4_node =
{
  0xc500000022ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_sdc4_list,
  &route_0xc500000021L_alm_sys_tcu_qhs_sdc2_node,
  &route_0xc500000023L_alm_sys_tcu_qhs_tsif_node
};
static ul_treeNodeType route_0xc500000023L_alm_sys_tcu_qhs_tsif_node =
{
  0xc500000023ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tsif_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000025L_alm_sys_tcu_qhs_qup2_node =
{
  0xc500000025ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_qup2_list,
  &route_0xc500000022L_alm_sys_tcu_qhs_sdc4_node,
  &route_0xc500000027L_alm_sys_tcu_qhs_qup1_node
};
static ul_treeNodeType route_0xc500000027L_alm_sys_tcu_qhs_qup1_node =
{
  0xc500000027ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_qup1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000029L_alm_sys_tcu_qhs_pdm_node =
{
  0xc500000029ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_pdm_list,
  &route_0xc500000025L_alm_sys_tcu_qhs_qup2_node,
  &route_0xc50000002fL_alm_sys_tcu_qhs_clk_ctl_node
};
static ul_treeNodeType route_0xc50000002cL_alm_sys_tcu_qhs_prng_node =
{
  0xc50000002cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_prng_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000002fL_alm_sys_tcu_qhs_clk_ctl_node =
{
  0xc50000002fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_clk_ctl_list,
  &route_0xc50000002cL_alm_sys_tcu_qhs_prng_node,
  &route_0xc500000034L_alm_sys_tcu_qhs_crypto0_cfg_node
};
static ul_treeNodeType route_0xc500000032L_alm_sys_tcu_qhs_tcsr_node =
{
  0xc500000032ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tcsr_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000034L_alm_sys_tcu_qhs_crypto0_cfg_node =
{
  0xc500000034ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_crypto0_cfg_list,
  &route_0xc500000032L_alm_sys_tcu_qhs_tcsr_node,
  NULL
};
static ul_treeNodeType route_0xc500000036L_alm_sys_tcu_qhs_imem_cfg_node =
{
  0xc500000036ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_imem_cfg_list,
  &route_0xc500000029L_alm_sys_tcu_qhs_pdm_node,
  &route_0xc500000058L_alm_sys_tcu_qhs_pcie0_cfg_node
};
static ul_treeNodeType route_0xc50000003fL_alm_sys_tcu_qhs_qdss_cfg_node =
{
  0xc50000003fULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_qdss_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000040L_alm_sys_tcu_qhs_cpr_cx_node =
{
  0xc500000040ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cpr_cx_list,
  &route_0xc50000003fL_alm_sys_tcu_qhs_qdss_cfg_node,
  &route_0xc50000004cL_alm_sys_tcu_srvc_cnoc_node
};
static ul_treeNodeType route_0xc50000004cL_alm_sys_tcu_srvc_cnoc_node =
{
  0xc50000004cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_cnoc_list,
  NULL,
  &route_0xc500000053L_alm_sys_tcu_qhs_usb3_1_node
};
static ul_treeNodeType route_0xc500000053L_alm_sys_tcu_qhs_usb3_1_node =
{
  0xc500000053ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_usb3_1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000058L_alm_sys_tcu_qhs_pcie0_cfg_node =
{
  0xc500000058ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_pcie0_cfg_list,
  &route_0xc500000040L_alm_sys_tcu_qhs_cpr_cx_node,
  &route_0xc500000060L_alm_sys_tcu_qhs_cpr_mx_node
};
static ul_treeNodeType route_0xc500000059L_alm_sys_tcu_qhs_pcie1_cfg_node =
{
  0xc500000059ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_pcie1_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000005cL_alm_sys_tcu_qhs_ufs_card_cfg_node =
{
  0xc50000005cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ufs_card_cfg_list,
  &route_0xc500000059L_alm_sys_tcu_qhs_pcie1_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc500000060L_alm_sys_tcu_qhs_cpr_mx_node =
{
  0xc500000060ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cpr_mx_list,
  &route_0xc50000005cL_alm_sys_tcu_qhs_ufs_card_cfg_node,
  &route_0xc50000009bL_alm_sys_tcu_qhs_dcc_cfg_node
};
static ul_treeNodeType route_0xc500000085L_alm_sys_tcu_xs_sys_tcu_cfg_node =
{
  0xc500000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000009bL_alm_sys_tcu_qhs_dcc_cfg_node =
{
  0xc50000009bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_dcc_cfg_list,
  &route_0xc500000085L_alm_sys_tcu_xs_sys_tcu_cfg_node,
  &route_0xc5000000a5L_alm_sys_tcu_qhs_pcie_modem_cfg_node
};
static ul_treeNodeType route_0xc5000000a5L_alm_sys_tcu_qhs_pcie_modem_cfg_node =
{
  0xc5000000a5ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_pcie_modem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000a6L_alm_sys_tcu_qxs_pimem_node =
{
  0xc5000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qxs_pimem_list,
  &route_0xc500000036L_alm_sys_tcu_qhs_imem_cfg_node,
  &route_0xc5000000dbL_alm_sys_tcu_qhs_aoss_node
};
static ul_treeNodeType route_0xc5000000a7L_alm_sys_tcu_qhs_pimem_cfg_node =
{
  0xc5000000a7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_pimem_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000b7L_alm_sys_tcu_qhs_ipa_node =
{
  0xc5000000b7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ipa_list,
  &route_0xc5000000a7L_alm_sys_tcu_qhs_pimem_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc5000000beL_alm_sys_tcu_qhs_qspi_node =
{
  0xc5000000beULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_qspi_list,
  &route_0xc5000000b7L_alm_sys_tcu_qhs_ipa_node,
  &route_0xc5000000d7L_alm_sys_tcu_qhs_tlmm2_node
};
static ul_treeNodeType route_0xc5000000d6L_alm_sys_tcu_qhs_tlmm0_node =
{
  0xc5000000d6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tlmm0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000d7L_alm_sys_tcu_qhs_tlmm2_node =
{
  0xc5000000d7ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tlmm2_list,
  &route_0xc5000000d6L_alm_sys_tcu_qhs_tlmm0_node,
  &route_0xc5000000d8L_alm_sys_tcu_qhs_tlmm1_node
};
static ul_treeNodeType route_0xc5000000d8L_alm_sys_tcu_qhs_tlmm1_node =
{
  0xc5000000d8ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tlmm1_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000dbL_alm_sys_tcu_qhs_aoss_node =
{
  0xc5000000dbULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_aoss_list,
  &route_0xc5000000beL_alm_sys_tcu_qhs_qspi_node,
  &route_0xc5000000ecL_alm_sys_tcu_qhs_ufs_mem_cfg_node
};
static ul_treeNodeType route_0xc5000000dcL_alm_sys_tcu_qhs_compute_dsp_node =
{
  0xc5000000dcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_compute_dsp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000e0L_alm_sys_tcu_qhs_llcc_node =
{
  0xc5000000e0ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_llcc_list,
  &route_0xc5000000dcL_alm_sys_tcu_qhs_compute_dsp_node,
  NULL
};
static ul_treeNodeType route_0xc5000000ecL_alm_sys_tcu_qhs_ufs_mem_cfg_node =
{
  0xc5000000ecULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ufs_mem_cfg_list,
  &route_0xc5000000e0L_alm_sys_tcu_qhs_llcc_node,
  &route_0xc5000000f3L_alm_sys_tcu_qns_llcc_node
};
static ul_treeNodeType route_0xc5000000edL_alm_sys_tcu_qhs_vsense_ctrl_cfg_node =
{
  0xc5000000edULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_vsense_ctrl_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc5000000f3L_alm_sys_tcu_qns_llcc_node =
{
  0xc5000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qns_llcc_list,
  &route_0xc5000000edL_alm_sys_tcu_qhs_vsense_ctrl_cfg_node,
  NULL
};
static ul_treeNodeType route_0xc5000000fcL_alm_sys_tcu_srvc_aggre1_noc_node =
{
  0xc5000000fcULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_aggre1_noc_list,
  &route_0xc5000000a6L_alm_sys_tcu_qxs_pimem_node,
  &route_0xc500000146L_alm_sys_tcu_qhs_cal_dp1_node
};
static ul_treeNodeType route_0xc5000000fdL_alm_sys_tcu_srvc_aggre2_noc_node =
{
  0xc5000000fdULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_aggre2_noc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000102L_alm_sys_tcu_srvc_sys_gemnoc_node =
{
  0xc500000102ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_sys_gemnoc_list,
  &route_0xc5000000fdL_alm_sys_tcu_srvc_aggre2_noc_node,
  &route_0xc50000011cL_alm_sys_tcu_qhs_ahb2phy0_node
};
static ul_treeNodeType route_0xc50000011cL_alm_sys_tcu_qhs_ahb2phy0_node =
{
  0xc50000011cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ahb2phy0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000011eL_alm_sys_tcu_qhs_cpr_mmcx_node =
{
  0xc50000011eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cpr_mmcx_list,
  &route_0xc500000102L_alm_sys_tcu_srvc_sys_gemnoc_node,
  &route_0xc500000125L_alm_sys_tcu_qhs_qup0_node
};
static ul_treeNodeType route_0xc500000125L_alm_sys_tcu_qhs_qup0_node =
{
  0xc500000125ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_qup0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000127L_alm_sys_tcu_srvc_even_gemnoc_node =
{
  0xc500000127ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_even_gemnoc_list,
  &route_0xc50000011eL_alm_sys_tcu_qhs_cpr_mmcx_node,
  &route_0xc500000143L_alm_sys_tcu_qhs_ipc_router_node
};
static ul_treeNodeType route_0xc50000013aL_alm_sys_tcu_srvc_odd_gemnoc_node =
{
  0xc50000013aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_odd_gemnoc_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000140L_alm_sys_tcu_qhs_ahb2phy1_node =
{
  0xc500000140ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ahb2phy1_list,
  &route_0xc50000013aL_alm_sys_tcu_srvc_odd_gemnoc_node,
  &route_0xc500000142L_alm_sys_tcu_qhs_cx_rdpm_node
};
static ul_treeNodeType route_0xc500000142L_alm_sys_tcu_qhs_cx_rdpm_node =
{
  0xc500000142ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cx_rdpm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000143L_alm_sys_tcu_qhs_ipc_router_node =
{
  0xc500000143ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_ipc_router_list,
  &route_0xc500000140L_alm_sys_tcu_qhs_ahb2phy1_node,
  &route_0xc500000144L_alm_sys_tcu_qhs_isense_node
};
static ul_treeNodeType route_0xc500000144L_alm_sys_tcu_qhs_isense_node =
{
  0xc500000144ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_isense_list,
  NULL,
  &route_0xc500000145L_alm_sys_tcu_qhs_cal_dp0_node
};
static ul_treeNodeType route_0xc500000145L_alm_sys_tcu_qhs_cal_dp0_node =
{
  0xc500000145ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cal_dp0_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000146L_alm_sys_tcu_qhs_cal_dp1_node =
{
  0xc500000146ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cal_dp1_list,
  &route_0xc500000127L_alm_sys_tcu_srvc_even_gemnoc_node,
  &route_0xd70000001eL_qnm_camnoc_icp_xs_qdss_stm_node
};
static ul_treeNodeType route_0xc500000148L_alm_sys_tcu_qhs_cp_node =
{
  0xc500000148ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_cp_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc500000149L_alm_sys_tcu_qhs_dpm_node =
{
  0xc500000149ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_dpm_list,
  &route_0xc500000148L_alm_sys_tcu_qhs_cp_node,
  NULL
};
static ul_treeNodeType route_0xc50000014aL_alm_sys_tcu_qhs_dma_bwmon_node =
{
  0xc50000014aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_dma_bwmon_list,
  &route_0xc500000149L_alm_sys_tcu_qhs_dpm_node,
  &route_0xc50000014dL_alm_sys_tcu_srvc_noc_node
};
static ul_treeNodeType route_0xc50000014bL_alm_sys_tcu_qhs_llm_node =
{
  0xc50000014bULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_llm_list,
  NULL,
  &route_0xc50000014cL_alm_sys_tcu_qhs_tcm_node
};
static ul_treeNodeType route_0xc50000014cL_alm_sys_tcu_qhs_tcm_node =
{
  0xc50000014cULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_qhs_tcm_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xc50000014dL_alm_sys_tcu_srvc_noc_node =
{
  0xc50000014dULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_alm_sys_tcu_srvc_noc_list,
  &route_0xc50000014bL_alm_sys_tcu_qhs_llm_node,
  &route_0xd700000014L_qnm_camnoc_icp_qhs_apss_node
};
static ul_treeNodeType route_0xd700000000L_qnm_camnoc_icp_ebi_node =
{
  0xd700000000ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_ebi_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xd700000014L_qnm_camnoc_icp_qhs_apss_node =
{
  0xd700000014ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_qhs_apss_list,
  &route_0xd700000000L_qnm_camnoc_icp_ebi_node,
  &route_0xd70000001aL_qnm_camnoc_icp_qxs_imem_node
};
static ul_treeNodeType route_0xd70000001aL_qnm_camnoc_icp_qxs_imem_node =
{
  0xd70000001aULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_qxs_imem_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xd70000001eL_qnm_camnoc_icp_xs_qdss_stm_node =
{
  0xd70000001eULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_xs_qdss_stm_list,
  &route_0xc50000014aL_alm_sys_tcu_qhs_dma_bwmon_node,
  &route_0xd7000000f3L_qnm_camnoc_icp_qns_llcc_node
};
static ul_treeNodeType route_0xd700000085L_qnm_camnoc_icp_xs_sys_tcu_cfg_node =
{
  0xd700000085ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_xs_sys_tcu_cfg_list,
  NULL,
  NULL
};
static ul_treeNodeType route_0xd7000000a6L_qnm_camnoc_icp_qxs_pimem_node =
{
  0xd7000000a6ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_qxs_pimem_list,
  &route_0xd700000085L_qnm_camnoc_icp_xs_sys_tcu_cfg_node,
  NULL
};
static ul_treeNodeType route_0xd7000000f3L_qnm_camnoc_icp_qns_llcc_node =
{
  0xd7000000f3ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_qnm_camnoc_icp_qns_llcc_list,
  &route_0xd7000000a6L_qnm_camnoc_icp_qxs_pimem_node,
  &route_0xd800000147L_amm_npu_sys_cdp_w_qns_npu_sys_node
};
static ul_treeNodeType route_0xd800000147L_amm_npu_sys_cdp_w_qns_npu_sys_node =
{
  0xd800000147ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_amm_npu_sys_cdp_w_qns_npu_sys_list,
  NULL,
  &route_0xda00000147L_amm_npu_sys_qns_npu_sys_node
};
static ul_treeNodeType route_0xda00000147L_amm_npu_sys_qns_npu_sys_node =
{
  0xda00000147ULL,                        /* KEY: MASTER_ID:SLAVE_ID */
  &route_amm_npu_sys_qns_npu_sys_list,
  NULL,
  NULL
};

/****************************************************************************/
/*                              LISTS                                       */
/****************************************************************************/
/* List of buses */
static icb_bus_def_type *bus_list[] = 
{
  &bus_aggre1_noc,
  &bus_aggre2_noc,
  &bus_camnoc_virt,
  &bus_compute_noc,
  &bus_config_noc,
  &bus_dc_noc,
  &bus_gem_noc,
  &bus_mc_virt,
  &bus_mmss_noc,
  &bus_npu_noc,
  &bus_system_noc,
};

/* List of masters */
static icb_master_def_type *master_list[] = 
{
  &master_alm_gpu_tcu,
  &master_alm_sys_tcu,
  &master_amm_npu_sys,
  &master_amm_npu_sys_cdp_w,
  &master_chm_apps,
  &master_llcc_mc,
  &master_qhm_a1noc_cfg,
  &master_qhm_a2noc_cfg,
  &master_qhm_cfg,
  &master_qhm_cnoc_dc_noc,
  &master_qhm_gemnoc_cfg,
  &master_qhm_mnoc_cfg,
  &master_qhm_qdss_bam,
  &master_qhm_qspi,
  &master_qhm_qup0,
  &master_qhm_qup1,
  &master_qhm_qup2,
  &master_qhm_snoc_cfg,
  &master_qhm_tsif,
  &master_qnm_aggre1_noc,
  &master_qnm_aggre2_noc,
  &master_qnm_camnoc_hf,
  &master_qnm_camnoc_icp,
  &master_qnm_camnoc_sf,
  &master_qnm_cmpnoc,
  &master_qnm_cnoc,
  &master_qnm_gemnoc,
  &master_qnm_gemnoc_pcie,
  &master_qnm_gpu,
  &master_qnm_mnoc_hf,
  &master_qnm_mnoc_sf,
  &master_qnm_npu,
  &master_qnm_pcie,
  &master_qnm_snoc,
  &master_qnm_snoc_gc,
  &master_qnm_snoc_sf,
  &master_qnm_video0,
  &master_qnm_video1,
  &master_qnm_video_cvp,
  &master_qxm_camnoc_hf0_uncomp,
  &master_qxm_camnoc_hf1_uncomp,
  &master_qxm_camnoc_sf_uncomp,
  &master_qxm_crypto,
  &master_qxm_ipa,
  &master_qxm_mdp0,
  &master_qxm_mdp1,
  &master_qxm_pimem,
  &master_qxm_rot,
  &master_xm_gic,
  &master_xm_pcie3_0,
  &master_xm_pcie3_1,
  &master_xm_pcie3_modem,
  &master_xm_qdss_dap,
  &master_xm_qdss_etr,
  &master_xm_sdc2,
  &master_xm_sdc4,
  &master_xm_ufs_card,
  &master_xm_ufs_mem,
  &master_xm_usb3_0,
  &master_xm_usb3_1,
};

/* List of slaves */
static icb_slave_def_type *slave_list[] = 
{
  &slave_ebi,
  &slave_qhs_a1_noc_cfg,
  &slave_qhs_a2_noc_cfg,
  &slave_qhs_ahb2phy0,
  &slave_qhs_ahb2phy1,
  &slave_qhs_aoss,
  &slave_qhs_apss,
  &slave_qhs_cal_dp0,
  &slave_qhs_cal_dp1,
  &slave_qhs_camera_cfg,
  &slave_qhs_clk_ctl,
  &slave_qhs_compute_dsp,
  &slave_qhs_cp,
  &slave_qhs_cpr_cx,
  &slave_qhs_cpr_mmcx,
  &slave_qhs_cpr_mx,
  &slave_qhs_crypto0_cfg,
  &slave_qhs_cx_rdpm,
  &slave_qhs_dcc_cfg,
  &slave_qhs_ddrss_cfg,
  &slave_qhs_display_cfg,
  &slave_qhs_dma_bwmon,
  &slave_qhs_dpm,
  &slave_qhs_gpuss_cfg,
  &slave_qhs_imem_cfg,
  &slave_qhs_ipa,
  &slave_qhs_ipc_router,
  &slave_qhs_isense,
  &slave_qhs_llcc,
  &slave_qhs_llm,
  &slave_qhs_lpass_cfg,
  &slave_qhs_memnoc,
  &slave_qhs_mnoc_cfg,
  &slave_qhs_npu_cfg,
  &slave_qhs_pcie0_cfg,
  &slave_qhs_pcie1_cfg,
  &slave_qhs_pcie_modem_cfg,
  &slave_qhs_pdm,
  &slave_qhs_pimem_cfg,
  &slave_qhs_prng,
  &slave_qhs_qdss_cfg,
  &slave_qhs_qspi,
  &slave_qhs_qup0,
  &slave_qhs_qup1,
  &slave_qhs_qup2,
  &slave_qhs_sdc2,
  &slave_qhs_sdc4,
  &slave_qhs_snoc_cfg,
  &slave_qhs_tcm,
  &slave_qhs_tcsr,
  &slave_qhs_tlmm0,
  &slave_qhs_tlmm1,
  &slave_qhs_tlmm2,
  &slave_qhs_tsif,
  &slave_qhs_ufs_card_cfg,
  &slave_qhs_ufs_mem_cfg,
  &slave_qhs_usb3_0,
  &slave_qhs_usb3_1,
  &slave_qhs_venus_cfg,
  &slave_qhs_vsense_ctrl_cfg,
  &slave_qns_a1noc_snoc,
  &slave_qns_a2noc_snoc,
  &slave_qns_camnoc_uncomp,
  &slave_qns_cdsp_mem_noc,
  &slave_qns_cnoc,
  &slave_qns_cnoc_a2noc,
  &slave_qns_gem_noc_snoc,
  &slave_qns_gemnoc_gc,
  &slave_qns_gemnoc_sf,
  &slave_qns_llcc,
  &slave_qns_mem_noc_hf,
  &slave_qns_mem_noc_sf,
  &slave_qns_npu_sys,
  &slave_qns_pcie_mem_noc,
  &slave_qns_pcie_modem_mem_noc,
  &slave_qns_sys_pcie,
  &slave_qxs_imem,
  &slave_qxs_pimem,
  &slave_srvc_aggre1_noc,
  &slave_srvc_aggre2_noc,
  &slave_srvc_cnoc,
  &slave_srvc_even_gemnoc,
  &slave_srvc_mnoc,
  &slave_srvc_noc,
  &slave_srvc_odd_gemnoc,
  &slave_srvc_snoc,
  &slave_srvc_sys_gemnoc,
  &slave_xs_pcie_0,
  &slave_xs_pcie_1,
  &slave_xs_pcie_modem,
  &slave_xs_qdss_stm,
  &slave_xs_sys_tcu_cfg,
};

/* List of hardware nodes */
static icb_hw_node_type *hw_node_list[] =
{
  &hw_node_acv,
  &hw_node_alc,
  &hw_node_mc0,
  &hw_node_sh0,
  &hw_node_mm0,
  &hw_node_ce0,
  &hw_node_ip0,
  &hw_node_mm1,
  &hw_node_sh2,
  &hw_node_mm2,
  &hw_node_qup0,
  &hw_node_sh3,
  &hw_node_mm3,
  &hw_node_sh4,
  &hw_node_sn0,
  &hw_node_co0,
  &hw_node_cn0,
  &hw_node_sn1,
  &hw_node_sn2,
  &hw_node_co2,
  &hw_node_sn3,
  &hw_node_sn4,
  &hw_node_sn5,
  &hw_node_sn6,
  &hw_node_sn7,
  &hw_node_sn8,
  &hw_node_sn9,
  &hw_node_sn11,
  &hw_node_sn12,
};

/*============================================================================
                               TOPOLOGY DEFINITIONS
============================================================================*/
static icb_topology_type topology =
{
  { RSC_DRV_HLOS, NULL }, /**< RPMh handle definition */
  &route_0x3100000125L_xm_qdss_dap_qhs_qup0_node,
  ICB_ARRAY(bus_list),
  ICB_ARRAY(master_list),
  ICB_ARRAY(slave_list),
  ICB_ARRAY(hw_node_list)
};

static icb_topology_type *topology_list[] =
{
  &topology,
};

/*============================================================================
                          ARBITER NODE DEFINITION
============================================================================*/
static icb_arbiter_node_data_type resource_data =
{
  &topology,
  0,
};

static npa_resource_definition icb_node_resources[] = 
{
  { /* hlos RSC */
    "/icb/arbiter", 
    "Arbitration Request",
    NPA_MAX_STATE,  /* Max "value" of state vector -- max len for now */
    NULL, /* Resource plugin to be filled in at run time */
    ( NPA_RESOURCE_DRIVER_UNCONDITIONAL | NPA_RESOURCE_ALLOW_CLIENT_TYPE_CHANGE |
      NPA_RESOURCE_REMOTE_ACCESS_ALLOWED ),
    (npa_user_data)&resource_data,
    NULL,
    NULL,
  },
};

static npa_node_definition icb_node_defn = 
{ 
  "/icb/arbiter", 
  NULL,  /* Driver function to be filled in at run time. */
  NPA_NODE_DEFAULT,
  NULL,
  NPA_EMPTY_ARRAY,
  NPA_ARRAY( icb_node_resources )
};

/*============================================================================
                     ARBITER STANDALONE NODE DEFINITIONS
============================================================================*/
/**** Node: alc ****/
static icb_standalone_data_type icb_standalone_node_alc_data =
{
  ICB_STANDALONE_INTERFACE_FAL,
  { RSC_DRV_HLOS, NULL }, /**< RPMh handle definition */
  &hw_node_alc,
  NULL,
};

static npa_resource_definition icb_standalone_node_alc_resources[] = 
{
  { 
    "/icb/alc", 
    "FAL",
    NPA_MAX_STATE,
    NULL,  /* Plugin to be filled in at run time. */
    NPA_RESOURCE_REMOTE_ACCESS_ALLOWED,
    (npa_user_data)&icb_standalone_node_alc_data,
    NULL,
    NULL,
  },
};

static icb_standalone_node_type icb_standalone_node_alc =
{
  { 
    "/node/icb/alc", 
    NULL,  /* Driver function to be filled in at run time. */
    NPA_NODE_DEFAULT,
    NULL,
    NPA_EMPTY_ARRAY,
    NPA_ARRAY( icb_standalone_node_alc_resources )
  },
};

/**** Node: ip0 ****/
static icb_standalone_data_type icb_standalone_node_ip0_data =
{
  ICB_STANDALONE_INTERFACE_CLOCK,
  { RSC_DRV_HLOS, NULL }, /**< RPMh handle definition */
  &hw_node_ip0,
  NULL,
};

static npa_resource_definition icb_standalone_node_ip0_resources[] = 
{
  { 
    "/clk/ipa", 
    "KHz",
    NPA_MAX_STATE,
    NULL,  /* Plugin to be filled in at run time. */
    NPA_RESOURCE_REMOTE_ACCESS_ALLOWED,
    (npa_user_data)&icb_standalone_node_ip0_data,
    NULL,
    NULL,
  },
};

static icb_standalone_node_type icb_standalone_node_ip0 =
{
  { 
    "/node/clk/ipa", 
    NULL,  /* Driver function to be filled in at run time. */
    NPA_NODE_DEFAULT,
    NULL,
    NPA_EMPTY_ARRAY,
    NPA_ARRAY( icb_standalone_node_ip0_resources )
  },
};

/**** Node: ipc ****/
static icb_standalone_data_type icb_standalone_node_ipc_data =
{
  ICB_STANDALONE_INTERFACE_QMP,
  { RSC_DRV_HLOS, NULL }, /**< RPMh handle definition */
  NULL,
  "ipa_pc",
};

static npa_node_dependency icb_standalone_node_ipc_dependencies[] =
{
   {"/init/qmp_client", NPA_NO_CLIENT, NULL},  /* QMP message protocol */
};

static npa_resource_definition icb_standalone_node_ipc_resources[] = 
{
  { 
    "/ipa/pc", 
    "On/Off",
    NPA_MAX_STATE,
    NULL,  /* Plugin to be filled in at run time. */
    NPA_RESOURCE_REMOTE_ACCESS_ALLOWED,
    (npa_user_data)&icb_standalone_node_ipc_data,
    NULL,
    NULL,
  },
};

static icb_standalone_node_type icb_standalone_node_ipc =
{
  { 
    "/node/ipa/pc", 
    NULL,  /* Driver function to be filled in at run time. */
    NPA_NODE_DEFAULT,
    NULL,
    NPA_ARRAY( icb_standalone_node_ipc_dependencies ),
    NPA_ARRAY( icb_standalone_node_ipc_resources )
  },
};

static icb_standalone_node_type *icb_standalone_nodes[] =
{
  &icb_standalone_node_alc,
  &icb_standalone_node_ip0,
  &icb_standalone_node_ipc,
};

/*============================================================================
                   EXTERNAL DATA DECLARATIONS
============================================================================*/
icb_info_type icb_info =
{
  &icb_node_defn, 
  ICB_ARRAY(topology_list),
  ICB_ARRAY(icb_standalone_nodes),
  {
    "+RPMH_BCM_BCM_STATUS",
    0,
    0x1F00,
    0,
  },
  NULL,
};

