uint16	 checksum__0_0 0xf90 
uint16	 total_bytes__0_0 3436 
uint8	 field_type__0_0 12 
uint8	 field_flag__0_0 0 
uint16	 field_offset__0_0 0x0 
uint16	 field_bytes__0_0 3430 
uint8	 reserved__0_0 0 
uint8	 reserved__0_1 0 
uint8	 ctlIndex2G_11b_mode_0_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_0_G_0_0 0x2 
uint16	 ctlIndex2G_11b_numSSMask_0_G_0_0 0x1 
uint8	 ctlIndex2G_11b_mode_1_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_1_G_0_0 0x1 
uint16	 ctlIndex2G_11b_numSSMask_1_G_0_0 0x1 
uint8	 ctlIndex2G_11b_mode_2_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_2_G_0_0 0x2 
uint16	 ctlIndex2G_11b_numSSMask_2_G_0_0 0x1 
uint8	 ctlIndex2G_11b_mode_3_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_3_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_3_G_0_0 0x1 
uint16	 ctlIndex2G_11b_numSSMask_3_G_0_0 0x1 
uint8	 ctlIndex2G_11b_mode_4_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_4_G_0_0 0x2 
uint16	 ctlIndex2G_11b_numSSMask_4_G_0_0 0x1 
uint8	 ctlIndex2G_11b_mode_5_G_0_0 1 
uint8	 ctlIndex2G_11b_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_11b_numChMask_5_G_0_0 0x1 
uint16	 ctlIndex2G_11b_numSSMask_5_G_0_0 0x1 
uint8	 ctlFreqbin2G_11b_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 
uint8	 ctl2G11bReserved_G_0_0 0 0 
uint8	 ctlData2G_11b_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_11b_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_11b_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_11b_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_11b_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_11b_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlIndex2G_HT20_mode_0_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_0_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_0_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_1_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_1_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_1_G_0_0 0x2 
uint8	 ctlIndex2G_HT20_mode_2_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_2_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_2_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_3_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_3_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_3_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_4_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_4_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_4_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_5_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_5_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_5_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_6_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_6_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_6_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_6_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_7_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_7_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_7_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_7_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_8_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_8_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_8_G_0_0 0x2 
uint8	 ctlIndex2G_HT20_mode_9_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_9_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_9_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_10_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_10_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_10_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_10_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_11_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_11_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_11_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_11_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_12_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_12_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_12_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_12_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_13_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_13_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_13_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_13_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_14_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_14_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_14_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_14_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_15_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_15_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_15_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_15_G_0_0 0x2 
uint8	 ctlIndex2G_HT20_mode_16_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_16_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_16_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_16_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_17_G_0_0 2 
uint8	 ctlIndex2G_HT20_bf_reg_17_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_17_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_17_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_18_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_18_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_18_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_18_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_19_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_19_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_19_G_0_0 0x1 
uint16	 ctlIndex2G_HT20_numSSMask_19_G_0_0 0x1 
uint8	 ctlIndex2G_HT20_mode_20_G_0_0 0 
uint8	 ctlIndex2G_HT20_bf_reg_20_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT20_numChMask_20_G_0_0 0x2 
uint16	 ctlIndex2G_HT20_numSSMask_20_G_0_0 0x1 
uint8	 ctlFreqbin2G_HT20_G_0_0 112 117 122 127 132 137 142 147 152 157 162 167 172 184 
uint8	 ctlData2G_HT20_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_12_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_13_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_14_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_15_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_16_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_17_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_18_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_19_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT20_20_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlPad2 0 0 
uint8	 ctlIndex2G_HT40_mode_0_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_0_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_0_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_0_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_1_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_1_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_1_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_1_G_0_0 0x2 
uint8	 ctlIndex2G_HT40_mode_2_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_2_G_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_2_G_0_0 0x1 
uint16	 ctlIndex2G_HT40_numSSMask_2_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_3_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_3_G_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_3_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_3_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_4_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_4_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_4_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_4_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_5_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_5_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_5_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_5_G_0_0 0x2 
uint8	 ctlIndex2G_HT40_mode_6_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_6_G_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_6_G_0_0 0x1 
uint16	 ctlIndex2G_HT40_numSSMask_6_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_7_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_7_G_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_7_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_7_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_8_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_8_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_8_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_8_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_9_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_9_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_9_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_9_G_0_0 0x2 
uint8	 ctlIndex2G_HT40_mode_10_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_10_G_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_10_G_0_0 0x1 
uint16	 ctlIndex2G_HT40_numSSMask_10_G_0_0 0x1 
uint8	 ctlIndex2G_HT40_mode_11_G_0_0 3 
uint8	 ctlIndex2G_HT40_bf_reg_11_G_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex2G_HT40_numChMask_11_G_0_0 0x2 
uint16	 ctlIndex2G_HT40_numSSMask_11_G_0_0 0x1 
uint8	 ctlFreqbin2G_HT40_G_0_0 122 127 132 137 142 147 152 157 162 
uint8	 ctl2GHT40Reserved_G_0_0 0 0 0 
uint8	 ctlData2G_HT40_0_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_1_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_2_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_3_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_4_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_5_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_6_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_7_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_8_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_9_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_10_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlData2G_HT40_11_G_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0xbc 
uint8	 ctlSpare2G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
uint8	 ctlIndex5G_11a_mode_0_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_0_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_1_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_1_A_0_0 0x1 
uint16	 ctlIndex5G_11a_numSSMask_1_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_2_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_2_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_2_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_2_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_3_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_3_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_3_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_4_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_4_A_0_0 0x1 
uint16	 ctlIndex5G_11a_numSSMask_4_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_5_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_5_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_6_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_6_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_6_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_7_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_7_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_7_A_0_0 0x1 
uint16	 ctlIndex5G_11a_numSSMask_7_A_0_0 0x1 
uint8	 ctlIndex5G_11a_mode_8_A_0_0 0 
uint8	 ctlIndex5G_11a_bf_reg_8_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_11a_numChMask_8_A_0_0 0x2 
uint16	 ctlIndex5G_11a_numSSMask_8_A_0_0 0x1 
uint8	 ctlFreqbin5G_11a_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 
uint8	 ctl5G11aReserved_A_0_0 0 
uint8	 ctlData5G_11a_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_11a_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlPad4 0 0 0 
uint8	 ctlIndex5G_HT20_mode_0_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_0_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_1_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_HT20_mode_2_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_2_A_0_0 0x1 
uint16	 ctlIndex5G_HT20_numSSMask_2_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_3_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_3_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_4_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_4_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_5_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_5_A_0_0 0x2 
uint8	 ctlIndex5G_HT20_mode_6_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_6_A_0_0 0x1 
uint16	 ctlIndex5G_HT20_numSSMask_6_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_7_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_7_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_7_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_8_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_8_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_8_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_9_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_9_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_9_A_0_0 0x2 
uint8	 ctlIndex5G_HT20_mode_10_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_10_A_0_0 0x1 
uint16	 ctlIndex5G_HT20_numSSMask_10_A_0_0 0x1 
uint8	 ctlIndex5G_HT20_mode_11_A_0_0 2 
uint8	 ctlIndex5G_HT20_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT20_numChMask_11_A_0_0 0x2 
uint16	 ctlIndex5G_HT20_numSSMask_11_A_0_0 0x1 
uint8	 ctlFreqbin5G_HT20_A_0_0 76 80 84 88 92 96 100 104 140 144 148 152 156 160 164 168 172 176 180 184 189 193 197 201 205 255 255 255 255 
uint8	 ctl5GHT20Reserved_A_0_0 0 0 0 
uint8	 ctlData5G_HT20_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlData5G_HT20_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x0 0x0 0x0 0x0 
uint8	 ctlIndex5G_HT40_mode_0_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_0_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_1_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_HT40_mode_2_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_2_A_0_0 0x1 
uint16	 ctlIndex5G_HT40_numSSMask_2_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_3_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_3_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_4_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_4_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_5_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_5_A_0_0 0x2 
uint8	 ctlIndex5G_HT40_mode_6_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_6_A_0_0 0x1 
uint16	 ctlIndex5G_HT40_numSSMask_6_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_7_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_7_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_7_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_8_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_8_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_8_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_9_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_9_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_9_A_0_0 0x2 
uint8	 ctlIndex5G_HT40_mode_10_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_10_A_0_0 0x1 
uint16	 ctlIndex5G_HT40_numSSMask_10_A_0_0 0x1 
uint8	 ctlIndex5G_HT40_mode_11_A_0_0 3 
uint8	 ctlIndex5G_HT40_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_HT40_numChMask_11_A_0_0 0x2 
uint16	 ctlIndex5G_HT40_numSSMask_11_A_0_0 0x1 
uint8	 ctlFreqbin5G_HT40_A_0_0 78 82 86 90 94 98 102 142 146 150 154 158 162 166 170 174 178 182 191 195 199 203 
uint8	 ctl5GHT40Reserved_A_0_0 0 0 
uint8	 ctlData5G_HT40_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_HT40_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlIndex5G_VHT80_mode_0_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_0_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_1_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_1_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80_mode_2_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_2_A_0_0 0x1 
uint16	 ctlIndex5G_VHT80_numSSMask_2_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_3_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_3_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_4_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_4_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_5_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_5_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_5_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80_mode_6_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_6_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_6_A_0_0 0x1 
uint16	 ctlIndex5G_VHT80_numSSMask_6_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_7_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_7_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_7_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_7_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_8_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_8_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_8_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_8_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_9_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_9_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_9_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_9_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80_mode_10_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_10_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_10_A_0_0 0x1 
uint16	 ctlIndex5G_VHT80_numSSMask_10_A_0_0 0x1 
uint8	 ctlIndex5G_VHT80_mode_11_A_0_0 4 
uint8	 ctlIndex5G_VHT80_bf_reg_11_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80_numChMask_11_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80_numSSMask_11_A_0_0 0x1 
uint8	 ctlFreqbin5G_VHT80_A_0_0 82 86 90 94 98 146 150 154 158 162 166 170 174 178 195 199 
uint8	 ctlData5G_VHT80_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_6_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_7_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_8_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_9_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_10_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80_11_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_0_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_0_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_1_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_2_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_2_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_2_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_3_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_3_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_4_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_4_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_mode_5_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryLowerFreq_numSSMask_5_A_0_0 0x2 
uint8	 ctlModeExt5G_PrimaryLowerFreq_A_0_0 8 8 8 8 8 8 
uint8	 ctlFreqbin5G_VHT80p80_PrimaryLowerFreq_A_0_0 90 154 158 162 166 170 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryLowerFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_0_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_0_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_1_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_2_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_2_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_2_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_3_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_3_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_4_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_4_A_0_0 0x2 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_mode_5_A_0_0 7 
uint8	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_VHT80p80_PrimaryHigherFreq_numSSMask_5_A_0_0 0x2 
uint8	 ctlModeExt5G_VHT80p80_PrimaryHigherFreq_A_0_0 9 9 9 9 9 9 
uint8	 ctlFreqbin5G_VHT80p80_PrimaryHigherFreq_A_0_0 90 154 158 162 166 170 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT80p80_PrimaryHigherFreq_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlIndex5G_VHT160_mode_0_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_0_A_0_0 beamforming:0x0 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_0_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_0_A_0_0 0x2 
uint8	 ctlIndex5G_VHT160_mode_1_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_1_A_0_0 beamforming:0x1 regDmn:0x1 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_1_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_1_A_0_0 0x2 
uint8	 ctlIndex5G_VHT160_mode_2_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_2_A_0_0 beamforming:0x0 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_2_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_2_A_0_0 0x2 
uint8	 ctlIndex5G_VHT160_mode_3_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_3_A_0_0 beamforming:0x1 regDmn:0x4 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_3_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_3_A_0_0 0x2 
uint8	 ctlIndex5G_VHT160_mode_4_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_4_A_0_0 beamforming:0x0 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_4_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_4_A_0_0 0x2 
uint8	 ctlIndex5G_VHT160_mode_5_A_0_0 6 
uint8	 ctlIndex5G_VHT160_bf_reg_5_A_0_0 beamforming:0x1 regDmn:0x3 reserved:0x0 
uint16	 ctlIndex5G_VHT160_numChMask_5_A_0_0 0x2 
uint16	 ctlIndex5G_VHT160_numSSMask_5_A_0_0 0x2 
uint8	 ctlFreqbin5G_VHT160_A_0_0 90 154 158 162 166 170 
uint8	 ctl5GVHT160Reserved_A_0_0 0 0 
uint8	 ctlData5G_VHT160_0_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT160_1_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT160_2_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT160_3_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT160_4_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlData5G_VHT160_5_A_0_0 0x3c 0x3c 0x3c 0x3c 0x3c 0x3c 
uint8	 ctlSpare5G 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
